Free Essay

Computer Architecture

In:

Submitted By kimkimsy
Words 1531
Pages 7
CSC 213
ARCHITECTURE ASSIGNMENT

QUESTION 1

2.1. What is a stored program computer? A stored program computer is a computer to use a stored-program concept. A stored-program concept is the programming process could be facilitated if the program could be represented in a form suitable for storing in memory alongside the data. Then, a computer could get its instructions by reading them from memory, and a program could be set or altered by setting the values of a portion of memory.

2.2. The four main components of any general-purpose computer * Main memory (M) * I/O module (I, O) * Arithmetic-logic unit (CA) * Program control unit (CC)

2.3. The three principal constituents of a computer system at an intergreted circuit level * Transistors * Resistors * Capacitors 2.4. Explain Moore’s law
The famous Moore’s law, which was propounded by Gordon Moore, cofounder of Intel, in 1965. Moore observed that the number of transistors that could be put on a single chip was doubling every year and correctly predicted that this pace would continue into the near future. To the surprise of many, including Moore, the pace continued year after year and decade after decade. The pace slowed to a doubling every 18 months in the 1970s, but has sustained that rate ever since. 2.5. The key characteristics of a computer family * Similar or identical instruction set: In many cases, the exact same set of machine is instructions are supported on all members of the family. Thus, a program that executes on one machine will also execute on any other. In some cases, the lower end of the family has an instruction set that is a subset of that of the top end of the family. This means that programs can move up but not down. * Similar or identical operation system: The same basic operating system is available for all family members. In some cases, additional features are added is the higher-end members. * Increasing speed: The rate of instruction execution increases in going from lower to higher family members. * Increasing number of I/O ports: In going from lower to higher family members. * Increasing memory size: In going from lower to higher family members. * Increasing cost: In going from lower to higher family members. 2.6. The key distinguishing feature of a microprocessor. * Clock speeds * Bus width * Number of transistors (microns) * Addressable memory * Virtual memory QUESTION 2. 3.1. General categories of functions that are specified by computer instructions * Instruction fetch * Instruction execution.
3.2. List and briefly define possible states that define an instruction execution. i. Instruction address calculation-determine the address of the next instruction to be executed. ii. instruction fetch-read instruction from its memory location into the processor iii. Instruction operation decoding-analyze instructions to determine type of operation to be performed and operand to be used. iv. Operand addresses calculation-if operations involve reference to an operand in the memory or available via input/output, then determine the address of the operand. v. operand fetch-fetch the operand from memory or read it in from input output vi. Data operation-perform the operation indicated in the instruction vii. operand store-write the result in the memory or out to input/output.

3.3. Two approaches to dealing with multiple interrupts * The First approach is to disable interrupts while an interrupt is being processed. * The Second approach is to define priorities for interrupts and to allow an interrupt to higher priority to cause a lower-priority interrupt handler to be itself interrupted. 3.4. The interconnection structure must support the following types of transfers: * Memory to processor: The processor reads an instruction or a unit of data from memory. * Processor to memory: The processor writes a unit of data to memory. * I/O to processor: The processor reads data from an I/O device via an I/O module. * Processor to I/O: The processor sends data to the I/O device. * I/O to or from memory: For these two cases, an I/O module is allowed to exchange data directly with memory, without doing through the processor, using direct memory access (DMA). 3.5. What is the benefit of using a multiple-bus architecture compared to single bus architecture?

* Compared to single-bus architecture, the using of multiple-bus architecture has a great advantage in speed and of course, will affect performance also. Using multiple-bus architecture will make each device to connect to own bus, which means that each device will have its own bus. This way, it will be faster to transfer data of each device, so the data transfer doesn't have to queue like in the single-bus architecture where many devices are connected to a single-bus that will eventually reach the capacity of the bus and thus will make the data "queue". It will cost more to have multiple bus, but the cost will not match the need of faster speed, compared to the one of that single-bus architecture. * 3.6. List and briefly describe functional groups of signal lines for PCI. i. System pins -include clock and reset pins. ii. Address and data pins-include 32 lines which are time multiplexed for addresses and data. The other lines in the groups are used to validate and interpret the signal lines that carry the addresses and data. iii. Interface control pins-control the timing of transactions and provide coordination among the initiators and the target. iv. Arbitration pins-they are non-shared lines which act as arbiters. v. Error reporting lines-used to report parity and other errors.

QUESTION 3.

3. Consider a hypothetical microprocessor generating a 16-bit address (for example, assume that the program counter and the address registers are 16 bits wide) and having a 16-bit data bus.
a. What is the maximum memory address space that the processor can access directly if it is connected to a “16-bit memory”?

The Maximum memory address space = 2^16 = 64 Kbytes.

b. What is the maximum memory address space that the processor can access directly if it is connected to an “8-bit memory”?

The Maximum memory address space = 2^16 = 64 Kbytes.
Therefore, in (a) and (b), the microprocessor is to access 64K bytes, but the difference thing between them is that the access of 8-bit memory will transfer a 8 bits and the access of 16-bit memory may transfer 8 bits or 16 bits word.

c. What architectural features will allow this microprocessor to access a separate “I/O space”?

Separate I/O instructions are needed because during its execution will generate separate its own signals I/O signals. That signals will be different from the memory signals which is generated during the execution for memory instructions. Therefore, one more output pin will be needed to carry I/O signals.

d. If an input and an output instruction can specify an 8-bit I/O port number, how many 8-bit I/O ports can the microprocessor support? How many 16-bit I/O ports? Explain

With an 8-bit I/O port number the microprocessor can support 2^8 = 256 8-bit input ports,
And 2^8 = 256 8-bit output ports.
With an 8-bit I/O port number the microprocessor can support 2^8 = 256 16-bit input ports,
And 2^8 = 256 16-bit output ports.
Thus, the size of the I/O port will not change the number of I/O ports since the number of I/O ports depends on the number of bits which is used to represent the I/O port number (equals to 8 bits in both cases).

4. Consider a 32-bit microprocessor, with a 16-bit external data bus, driven by an 8-MHz input clock. Assume that this microprocessor has a bus cycle whose minimum duration equals four input clock cycles. What is the maximum data transfer rate across the bus that this microprocessor can sustain, in bytes/s? To increase its performance, would it be better to make its external data bus 32 bits or to double the external clock frequency supplied to the microprocessor? State any other assumptions you make, and explain. Hint: Determine the number of bytes that can be transferred per bus cycle.
Answer:
Since minimum bus cycle duration = 4 clock cycles and bus clock = 8 MHz Then, maximum bus cycle rate = 8 M / 4 = 2 M/s
Data transferred per bus cycle = 16 bit = 2 bytes
Data transfer rate per second = bus cycle rate * data per bus cycle = 2 M * 2 = 4 Mbytes/sec.
To increase its performance: * By doubling the frequency, it may mean adopting a new chip manufacturing technology (assuming each instruction will have the same number of clock cycles); * By doubling the external data bus, that means wider (may be newer) on-chip data bus drivers/latches and modifications to the bus control logic.

Therefore, in the first situation the speed of the memory chips will need to double, not to slow down the microprocessor. Regarding the second situation, the word length of the memory will must double to be able to send/receive 32-bit quantities.

Similar Documents

Free Essay

Computer Architecture

...Solution* for Chapter 1 Exercise* Solutions for Chapter 1 Exercises 1.1 5, CPU 1.2 1, abstraction 1.3 3, bit 1.4 8, computer family 1.5 19, memory 1.6 10, datapath 1.7 9, control 1.8 11, desktop (personal computer) 1.9 15, embedded system 1.10 22, server 1.11 18, LAN 1.12 27, WAN 1.13 23, supercomputer 1.14 14, DRAM 1.15 13, defect 1.16 6, chip 1.17 24, transistor 1.18 12, DVD 1.19 28, yield 1.20 2, assembler 1.21 20, operating system 1.22 7, compiler 1.23 25, VLSI 1.24 16, instruction 1.25 4, cache • 1.26 17, instruction set architecture Solutions for Chapter 1 Exercises 1.27 21, semiconductor 1.28 26, wafer 1.29 i 1.30 b 1.31 e 1.32 i 1.33 h 1.34 d 1.35 f 1.36 b 1.37 c 1.38 f 1.39 d 1.40 a 1.41 c 1.42 i 1.43 e 1.44 g 1.45 a 1.46 Magnetic disk: Time for 1/2 revolution =1/2 rev x 1/7200 minutes/rev X 60 seconds/ minutes 3 4.17 ms Time for 1/2 revolution = 1/2 rev x 1/10,000 minutes/rev X 60 seconds/ minutes = 3 ms Bytes on center circle = 1.35 MB/seconds X 1/1600 minutes/rev x 60 seconds/minutes = 50.6 KB Bytes on outside circle = 1.35 MB/seconds X 1/570 minutes/rev X 60 seconds/minutes = 142.1 KB 1.48 Total requests bandwidth = 30 requests/sec X 512 Kbit/request = 15,360 Kbit/sec < 100 Mbit/sec. Therefore, a 100 Mbit Ethernet link will be sufficient. Solution* for Chapter X Exarclsm 1.49 Possible solutions: Ethernet, IEEE 802.3, twisted pair cable, 10/100 Mbit Wireless Ethernet, IEEE 802.1 lb, no medium...

Words: 3285 - Pages: 14

Free Essay

Computer Architecture

...Cache Memory [pic] – Study of large program reveal that most of the execution time is spend, in the execution of a few routines (sub-sections). When the execution is localized within these routines, a number of instructions are executed repeatedly, This property of programs is known as LOCALITY OF REFERENCE. – Thus while some localized area of the program are executed repeatedly, the other areas are executed less frequently. – To reduce the execution time these most repeated segments may be placed in a fast memory known as CACHE (or Buffer) Memory. – The memory control circuitry is designed to take advantage of the property of LOCALITY OF REFERENCE. – If a word in a block of memory is read, that block is transferred to one of the slots of the cache. Cache Operation: – CPU requests contents of memory location – Check cache for this data – If present, get from cache (fast) – If not present, read required block from main memory to cache – Then deliver from cache to CPU – Cache includes tags to identify which block of main memory is in each cache slot [pic] [pic] [pic] Fig: Cache Organization Elements of Cache Design: Cache Size Write Policy Replacement Algorithm Mapping Function Block Size / Line Size CACHE SIZE: – Size of cache should be small enough so that average cost per bit is close to that of main memory and large enough so that average access time...

Words: 314 - Pages: 2

Premium Essay

Computer Architecture

...Computer Architecture Student’s name Professor Intro to Information Technology February 2, 2014 Computer Architecture John von Neumann published the Von Neumann architecture on June 30, 1945. The central processing unit (CPU), the memory, and the input/output devices (I/O) are the main three building blocks of the Von Neumann computer systems connected using the system bus. The components of the model are composed of memory, arithmetic logic unit (ALU), input/output, and the control unit. The memory is where all the data information is stored, in present computers it is call the RAM. The ALU is where the calculation and processing of information take place. The input gets information into the computer like the keyboard, and the mouse. The output gets information out of the computer like the monitor and the printer. The control unit makes sure that all other parts are doing their job correctly and on time. Modern computers still follow the idea of Von Neumann architecture. The CPU chip holds the control unit and the ALU and the memory in the form of RAM located on the motherboard. Von Neumann architecture is important in the present day. All modern computers are based on the same basic design. The central processing unit does the calculations, a memory to hold the data, and an interface that allows the input/output to change the information in memory. The architecture is simple and can be easily reduced to a smaller size and capacity needed. Back in 2012 at the University...

Words: 1605 - Pages: 7

Free Essay

Computer Architecture

...2/3/2014 Week 4 Assignment 1 Computer Architecture John von Neumann was a mathematician and polymath who was born on December 28 1903 and while he made major contributions to a number of fields the one we care about in the IT field is von Neumann Architecture. In 1946 he co wrote a paper with Arthur W. Burks and Hermann H. Goldstine and out lined what would be need for a general purpose electronic computer. The title of the paper was “Preliminary Discussion of the Logical Design of an Electronic Computing Instrument” ( von Neumann , 2000) and the idea of the paper would have far reaching impacts on the field of computer science and would lead the design and building of the first computer call Manchester Mark I witch ran its first program in 1948. While the history lesson of the man is all well and good the question we need to ask ourselves is how the von Neumann architecture works and what goes into the process. Von Neumann believe that computing machines contained four parts the arithmetic logic unit this part of the architecture is solely involved with carrying out calculations upon the data such as adding subtracting multiplying and division the control unit will manage the process of moving data and program into and out of the memory and also deal with carrying out program instructions the memory that can hold data and also the program processing that data in modern computers this RAM and the input-output devices which allows for the idea that a person needs to interact...

Words: 1344 - Pages: 6

Free Essay

Computer Architecture

...1(a) F(w,x,y,z) = wʹxʹyʹzʹ + wʹxʹyzʹ + wxʹyʹzʹ + wʹxyʹzʹ + wʹxyz + wʹxyzʹ + wxʹyzʹ | | | | | | | | | | | | | | | | Minimal sum of products form: F(w,x,y,z) = x’z’ + w’z’ + w’xy (b) F (w,x,y,z) = xz’ + w’z’ + w’xy (using Only NAND Gates) F F (c) (i) | | | | | | | | S (p,q,r) = p | | | | | | | | T (p,q,r) = pq’ + p’q = p XOR q | | | | | | | | U (p,q,r) = q’r + qr’ = p XOR r (ii) (d)(i) Multiplexer How it works: * A multiplexer is a combinational circuit which connects multiple input lines to a single output, allowing only a single selected input signal to be passed to the output line at a time. * An Input signal is selected to be passed to output based on selection code which is implemented as two select lines. Typical Inputs and Outputs: * Consider a 4 -to -1 Multiplexer, typical inputs include four input lines labelled C0, C1, C2 and C3, along with two select lines labelled S0 and S1. * Output include single output line labelled F. Labelled diagram of 4-to-1 Multiplexer: (ii) Jk Flip Flop How it works: * A JK flip-flop is a sequential circuit which has two inputs that are similar to that of an S-R flip-flop, however all possible combinations of input values are valid...

Words: 1667 - Pages: 7

Premium Essay

Computer Architecture

...Assignment 1: Computer Architecture Joseph Henry Strayer University CIS 106 Prof. Shaun Gray November 03, 2013 Assignment 1: Computer Architecture Von Neumann architecture is named after the late John Von Neumann, who was part of a team that created the EDVAC in 1944. This machine was the follow up to the ENIAC, simply because the ENIAC could not modify the program’s contents and could only hold 20 10-digit numbers at a time, needing to be programmed manually (Anderson, Ferro, & Hilton, 2011, p. 11) The concept of Von Neumann architecture is that of a stored program computer, where both binary instructions and data are stored on the main memory. Basically, a program is loaded into memory, and that program could modify itself and be written to perform other functions. Binary instructions are fetched at the same time that data operations occur since they share the same bus. From the computer’s memory, instructions are processed in order and executed by the central processing unit (CPU). The focal point is the CPU, which contains an arithmetic login unit (ALU), control unit (CU), and registers (small storage areas). The ALU performs mathematical functions, especially addition. The CU controls the data traffic in and out of the CPU. The registers are small high-speed units that store instructions and data for the CPU. The CPU accepts input and provides output to external devices. A crystal clock, known as the System Clock times each step in the fetch-execute cycle that...

Words: 1203 - Pages: 5

Free Essay

Computer Architectures

...Have you ever wondered how using a computer actually accomplishes tedious tasks? Tasks including connection to the internet, moving a file from one location to another, or having the ability to use a video application that helps interact with family in remote locations. If the needs of a computer were adequate enough to produce one specific function, such as typing, than the technologies we have now would not exist. The computers of today need to perform expeditious data processing for extensive data tasks. That’s approximately three billion calculates per second on just your average household computer. (Tymann 2008). This is all accomplished by programmable chip sets known as central processing units. Programmable codes within the central processing units are known as complex instruction set computing and reduced instruction set computing. Technologies in the present and the future depend on these architectures for expedited growth, without them society will halt in technological advances. These computing architectures provide the foundations of computer processing, although each having their specific advantages, disadvantages, pros, and cons. Information technology is rapidly growing, providing users and businesses a means to share digital data. Businesses gear towards investing money in all aspects of information technology systems to provide services for their customers. Users use computers as a means to communicate with family or watch the latest movie over the internet...

Words: 2285 - Pages: 10

Premium Essay

Computer Organization and Architecture

...Management Information Systems Program | MIS 545: Computer Organization and Architecture | Paper Systems Project My technology project will describe my personal computer systems that I currently use to complete projects for a variety of business acumens. Since the early1990’s I have provided various business services to small business and individuals including but not limited to financial and tax advice and preparation, data gathering and analysis and reporting, documentation services and notary services. I have twenty plus years of experience in Financial Services and Business Analysis focusing on Asset Management domain with strong skills in facilitating discussions regarding documenting methods and business procedures involving key stakeholders from both business side and IT sides to elicit high level requirements and estimate project feasibility, with these types of projects, usually for major banks I require a system that a) works, b) is secure and c) is compatible with client software and programs. That has perhaps been my most challenging feat in keeping up with technology. The basic hardware and software components Because I am one person, occasionally hiring out portions of larger projects, my equipment has been somewhat limited to that available to retail consumers. This business currently has four laptops, (only 3 being utilized) and three printer, scanner fax combination machines. I also have an external hard drive to which I can connect from anywhere...

Words: 1007 - Pages: 5

Premium Essay

Computer Architecture- Von Neumann Architecture

...Abstract Computer architecture and its history are important to understanding how a computer works. The Von Neumann architecture is the basic building block to the modern day computer. There are different types of functions within the Von Neumann architecture that have helped create an efficient design and allow computers to perform multiple functions rather than being used for one specific purpose. The Von Neumann model uses memory, system buses, and Boolean operators to communicate programs and perform functions. Computer Architecture- Von Neumann Architecture Explained A computer is an electronic device that operates under the control of instructions that are stored in memory. The concept of storing memory or instructions within the computer came from John Von Neumann. Von Neumann architecture can be best described as a stored program design. A stored programmed design means that the program that operates the computer and the instructions that carry out the program are stored on the computer in one location, memory. By having a stored program design, the computer doesn’t have to go through a rigorous process to be reprogrammed, or to perform multiple functions. The basic design of today’s computers is founded on the architecture of Von Neumann, which can be referred to as the “fetch-execute cycle”. The Von Neumann model consists of five major components that work together to make the computer perform. There is an area for memory to be held and processed; today we know...

Words: 1392 - Pages: 6

Premium Essay

Assignment 1: Computer Architecture

...Assignment 1: Computer Architecture Noel E Baez Professor Ali Abedin Introduction to Information Technology July 25, 2013 Abstract This paper will describe the Von Neumann Architecture and explain why it is important. It will describe and explain what a system bus is, and why it is needed in the computer system. A summary of the Boolean operators and the use in computers calculations will be included as well. Finally, a short list of various types of computer storage and memory will be included, and a definition of computer storage. Keywords: Neumann, Boolean, Memory, Storage, System, Bus John Von Neumann was born in 1903 in Budapest. He studied mathematics and graduated from the Pázmány Péter University in Budapest with a Ph.D. In 1930 he was invited to the University of Princeton to teach mathematics in the Institute for Advance Study of Princeton. Von Neumann possessed an extraordinary memory, he was a gifted man that made multiple contributions to the math world, and the computer world, but perhaps his biggest contribution is the creation of the Von Neumann Architecture. The Von Neumann architecture stated that a computer was able to have an uncomplicated, established structure, able to execute any calculation when given the proper command. The Model of this architecture is comprised of the following components, the memory, the control unit, the arithmetic logic unit (ALU). The memory was used to store the information from the ALU or processing unit. This...

Words: 1474 - Pages: 6

Premium Essay

Evolution of Computer Applications & Architecture

...Evolution of Computer Applications and Architecture By Ken Jacobi, Computer Architecture (IT-501) In discussing the evolution of computer architecture, we find that there are many angles on how people tend to view things. Some will take consideration in how things have changed over the last few years. Others will take a stronger look at the direction of where they believe technology is going. A third focus is in regards to the unexpected mistakes that people have made. In conjunction with the past, how can these mistakes be avoided in the coming future and evolution of technology; both for equal and competitive reasons. In part with this, we can turn to the very basic view about what makes a good design. Many architectural topics once began with the idea that if you build something and develop it correctly, change is not something one should expect. If it’s developed right the first time then you don’t have to change it. In this successful strive, people have come to the underlying conclusion that this is a very unrealistic position to be. A very good place to stress the relevance here is by dating back to the start of an exciting architectural turn of events that have gotten us to where we now are: the birth of modern computing. Many will say that this “landmark” of progress has lead to an evolutional launch that we constantly live within. It’s safe to say that these embarking events once began somewhere amongst the early 1970s. Coming out of the...

Words: 3634 - Pages: 15

Free Essay

Computer Architecture

...NAME: BOLAJI ABIODUN FOLORUNSO COURSE: COMPUTER ARCHITECTURE. INTRODUCTION As computer architectures become increasingly complex, more sophisticated analysis methods and optimization tools are required to harness their full performance. Technologies such as event-based sampling and expert systems are now augmenting traditional methods of performance analysis based upon profile and call graph tools. Understanding the basics of performance analysis, as well as the current state- of-the-art software optimization technologies, enables developers to pinpoint and implement solutions to application performance issues. One sophisticated processor, the Intel® Pentium® M processor, is growing in embedded application usage due to its high performance and low power utilization. The Intel Pentium M processor features Intel MMX™ and Streaming SIMD Extensions (SSE, SSE2) that enable higher performance through parallel computation. Getting the most out of the processor, however, requires that developers take full advantage of these built-in performance enhancements. Software optimization technology offered by advanced compilers utilizes the enhancements in Intel Pentium M processors in a fashion conducive to embedded development. Compiler technology provides access to these extensions with low development investment while maintaining backward compatibility and minimal code size, two critical challenges in embedded software development. The key to focusing the optimization process...

Words: 2037 - Pages: 9

Free Essay

Computer Architecture

...INTRODUCTION As computer architectures become increasingly complex, more sophisticated analysis methods and optimization tools are required to harness their full performance. Technologies such as event-based sampling and expert systems are now augmenting traditional methods of performance analysis based upon profile and call graph tools. Understanding the basics of performance analysis, as well as the current state- of-the-art software optimization technologies, enables developers to pinpoint and implement solutions to application performance issues. One sophisticated processor, the Intel® Pentium® M processor, is growing in embedded application usage due to its high performance and low power utilization. The Intel Pentium M processor features Intel MMX™ and Streaming SIMD Extensions (SSE, SSE2) that enable higher performance through parallel computation. Getting the most out of the processor, however, requires that developers take full advantage of these built-in performance enhancements. Software optimization technology offered by advanced compilers utilizes the enhancements in Intel Pentium M processors in a fashion conducive to embedded development. Compiler technology provides access to these extensions with low development investment while maintaining backward compatibility and minimal code size, two critical challenges in embedded software development. The key to focusing the optimization process, however, is to perform performance analysis. Performance analysis is...

Words: 267 - Pages: 2

Free Essay

Arm Processer for Computer Architecture

...Subject: The use of the ARM processor as an instruction tool for Computer Architecture Class Journal Article Title: Arms for the Poor: Selecting a Processor for Teaching Computer Architecture Author: Alan Clements Site: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5673541 When an individual chooses to become a teacher, professor, or some sort of instructor, he or she will become subject to one of the most primitive questions ever asked in the history of civilization: “Why?” However, generally speaking when a student asks the question “Why?” it is not for a genuine thirst for knowledge or explanation. It is not like a child who wants to know why the sky is blue, or why dogs can’t talk. A students real interpretation of the question why is more like: “Why is this important?”, or “Why do we have to learn this?”, or the big one (according to Algebra teachers), “Will I ever use this again in the real world?” A computer architecture professor is different from other professor (besides obviously being smarter ;) ), when having to answer this question. Unlike Algebra, which is pretty well established and unlikely to change operations in the next 10 years, Computer Architecture is a rapidly evolving industry and has the very good possibility to look completely different in the year 2022. So a computer architecture professor is faced with a difficult answer to the question. One answer could be “Yes you have to learn it, because it appears on the final and I will...

Words: 1463 - Pages: 6

Premium Essay

Nt1210 Unit 1 Computer Architecture Assignment

...Cover Page Course: Computer Architecture 101 (ICT121) Student Name: Muhammad Hasif Bin Sarodin Student Number: P1401518
 Due Date: 26 August 2014, 2359 hours Certification: I certify the content of the assignment to be my own and original work and that all sources have been accurately reported and acknowledged, and that this document has not been previously submitted in its entirety or in any educational establishment. TUTOR-MARKED ASSIGNMENT This tutor-marked assignment is worth 21% of the final mark for ICT121 Introduction to Computer Systems Architecture. The cut-off date for this assignment is 26 August 2014, 2359 hrs. _________________________________________________________________________________ Submit your solution document...

Words: 1908 - Pages: 8