Given a flip-flop circuit,
Determine how the circuit will behave for a sequence of inputs. Be able to use a flip-flop to store a single bit.

Basic Circuit Here's a basic circuit that involves just two NAND gates. There are two inputs to this circuit, X and Y. Can you generate a truth table for this circuit?

* Note that there is no connection where the two wires running from the output back to the input cross. Let's address that issue of the truth table. Here is a truth table for you to fill in. (Print this web page if you want to work on it.) X | Y | P | Q | 0 | 0 | | | 0 | 1 | | | 1 | 0 | | | 1 | 1 | | | Let's review what you know about this circuit. We can focus on what happens when X= 0, and Y = 0, the first entry in the truth table above. * If X = 0, then P = 1. We know that if either input to a NAND gate is 0, the output is 1. * Now. try to take advantage of the knowledge that P = 1. If P = 1 AND Y = 0, then Q = 1. It doesn't matter what P is, as long as Y = 0, Q will be 1. * That gives us the first entry in the truth table above. Here's the truth table with what we have figured out so far. X | Y | P | Q | 0 | 0 | 1 | 1 | 0 | 1 | | | 1 | 0 | | | 1 | 1 | | | Now, let's address the second entry in the truth table. In that situation, X = 0, and Y = 1. * If X = 0, then P = 1. We know that if either input to a NAND gate is 0, the output is 1. That's the same as before. * Now. try to take advantage of the knowledge that P = 1. If P = 1 AND Y = 1, then Q = 0. * That gives us the second entry in the truth table above. Here's the truth table with what we have figured out so far. X | Y | P | Q | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | | | 1 | 1 | | | Now, let's address the second entry in the truth table. In that situation, X = 0, and Y = 1. * If X = 0, then P = 1. We know that if either input to a NAND gate is 0, the output is 1. That's the same as before. * Now. try to take advantage of the knowledge that P = 1. If P = 1 AND Y = 1, then Q = 0. * That gives us the second entry in the truth table above. Here's the truth table with what we have figured out so far. X | Y | P | Q | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | | | 1 | 1 | | | Next, let's address the third entry in the truth table. In that situation, X = 1, and Y = 0. * If Y = 0, then Q = 1. We know that if either input to a NAND gate is 0, the output is 1. That's the same as before. However, this time, we take advantage of knowing that Y = 0. Before, it was X that was equal to zero, but X = 1 here and it doesn't help us get started. * Now. try to take advantage of the knowledge that Q = 1. If Q = 1 AND X = 1, then P = 0. * That gives us the third entry in the truth table above. Here's the truth table with what we have figured out so far. X | Y | P | Q | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | | | Finally, we have the case where X = 1 and Y = 1. * If X = 1, then we need to know Q to determine P. * If Y = 1, then we need to know P to determine Q. * We are stuck! There is no obvious way to proceed! There is one way to proceed. We could just assume that P = 1, for example. Let's try that. * If Y = 1, and P = 1, then we know that Q = 0. * If we know that Q = 0, it is an input to the top NAND gate, so the output there is 1. Thus, P = 1. That's what we assumed to start with, so we don't get a contradiction. * All is copasetic! Or is it? * Here is the truth table. X | Y | P | Q | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | This is interesting, but we need to note the following. * This result is not at all intuitive. * The circuit is symmetric. * If we have symmetric inputs (X = 1, Y = 1), we should have symmetric outputs. * Instead, we seem to have shown that P = 1 and Q = 0. That's not at all symmetric, and it it bothersome. * We got to the result by making an unsymmetrical assumption. We assumed P = 1. What if we made the opposite assumption? Let's assume P = 0. * If P = 0, then Q = 1 since P is an input to the bottom NAND gate. * If we know that Q = 1, it is an input to the top NAND gate, so the output there is P = 0 since the other input to the top gate, X, is also 1. * But, P = 0 is what we assumed to start all this. Again, we do not get a contradiction, so everything seems OK. * Here is the truth table for this situation. X | Y | P | Q | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | Now, we can't have it both ways. This truth table summarizes what we have found. X | Y | P | Q | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0
1 | 1
0 | There's something decidedly peculiar here. The output has to be one or the other of these two cases. Which is it? But, there's a related question. * When you were little and went to the playground, when you walked up to the see-saw, which direction did the see-saw tilt? Or did you call it a teeter-totter? * Like the see-saw/teeter-totter, this circuit depends upon what went on before. * It can exist in either state. The see-saw can tilt in either direction. Which state you find depends upon history. * This circuit has a name with that same-consonant-different-vowel property. It's called a flip-flop. Now, let's imagine that we do the following. * Let us assume that we input X = 1 and Y = 0. Then, the output will be P = 0, Q = 1. Here is the flip-flop in that state

* Then, consider what happens when Y changes from 0 to 1. Since P = 0, Q will not change when Y changes. It only takes one zero input to keep the output of a NAND gate at one. That means that the output does not change when Y changes to 1. We can reverse the initial inputs. * Let us assume that we input X = 0 and Y = 1. Then, the output will be P = 1, Q = 0. Here is the flip-flop in that state

* Now, consider what happens when X changes from 1 to 0. Since Q = 0, P will not change when X changes. It only takes one zero input to keep the output of a NAND gate at one. That means that the output does not change when X changes to 1. Some observations: * This circuit is a prototype of a memory element. It can store and remember one bit of information. * Before it's a good memory element, it will need a little work. * The method we used to determine possible states in the flip-flop, including especially the case of inputs with two possible stable states, is the method of contradiction. Click here to go to a note on the method of contradiction.

Bus Structure Basics
The bottom of any PC motherboard is an interconnecting maze of pathways that transport data, addresses, and instructions around the system. Each of these pathways is a bus, which is a group of tiny, very thin wires that carry signals from one part of the motherboard to another.
Two general types of bus structures are on every motherboard: * Internal bus: Interconnects main memory, the CPU, and all other components on the motherboard * External (expansion) bus: Connects the outside world of peripherals to the motherboard
The width of a bus determines the amount of data and how large an address it can transmit. The width of a bus is stated in bits. Just like a 4-lane highway has a capacity for 4 vehicles at a time, a 16-bit bus is capable of transmitting 16 bits of data at a time, and a 32-bit bus can transmit 32 bits of data. Obviously, the wider a bus is in bits, the more data it can carry.
The speed at which data moves on a bus is controlled by its clock speed, which is measured in megahertz (MHz). If the speed limit on the highway is faster, more cars and trucks per hour can move over it. Likewise, higher bus speeds can transmit more data per second. Think of it this way: If a bus (a passenger bus) must carry 300 people from point A to point B, but has a carrying capacity of only 66 people at a time, it must make several trips. The faster the bus makes its outbound and inbound trips, the sooner all the people get to beautiful downtown point B. Another solution would be to get a bigger bus. A faster bus (the computer kind) can transfer more data faster, which makes the operating system and applications run faster.
Understanding the internal bus The internal bus, also known as the system bus, is that maze of wires on the motherboard. It provides the internal components of the computer with four necessities: * Power: Power comes to the motherboard straight from the power supply. The motherboard uses the system bus to distribute power to components mounted on or plugged into it. * Control signals: The control unit within the CPU sends out control signals to coordinate the activities of the system. These signals are carried on the internal control bus. * Addresses: PC components pass data and instructions between one another using memory location addresses to reference the location of the data or instructions in memory. Addresses are transmitted on the internal address bus. * Data: Data and instructions are transferred between components on the internal data bus.
PC buses carry data, instructions, or the addresses of data or instructions. Just as a passenger bus stops at different places to pick up or drop off people, a PC bus deposits or collects addresses or data at the different components (such as CPU and memory) to which it is connected. The address carried on the address bus references the source or destination location of the data or instructions carried on the data bus.
The contents of the address and data buses are like a letter in the mail: * The envelope (the letter’s address bus) has the address of the letter’s destination. * The message in the envelope (the letter’s data bus) is its data.
On Pentium motherboards, the system chipset is the communications controller between all the components that interact with the system bus. The system chipset coordinates with each component or device so that each device properly interacts with every other one.
Defining the external (expansion) bus
In the context of the PC, when most people refer to “the bus,” they are referring to both the data bus and (without knowing it) the address bus. The external bus must connect and coordinate with these two internal bus workhorses.
Earlier in this chapter, I list the external bus as one of the general bus structures of the PC. This bus, also called the expansion bus, allows peripheral devices to communicate with the motherboard and its components, almost like they were a part of the motherboard itself. To add a new device to the PC, the device’s adapter card is plugged into the expansion bus via a compatible expansion slot on the motherboard. After it’s plugged in, the device is able to communicate with the CPU and other system components.
The expansion slot for any of the supported expansion bus architectures comprises a certain number of small metal spring connectors that line each side of the connector slot. The slot connectors match up with the tabs on the card’s edge connectors, as shown in Figure 5-1. Figure 5-1: The connectors on an expansion card are aligned to those in the expansion slot.
Like pins in a serial or parallel cable, each connection between the slot and the card form a channel that services a need of the expansion card: * Clock signal: This connection provides the card with the signal of the bus clock so that it can synchronize its communications with the buses of the motherboard. * Interrupt request (IRQ): A request that tells the CPU to interrupt what it’s doing to take care of the special needs of the device sending the IRQ. Devices are assigned IRQ numbers so that the CPU knows which device is the rude one. When you install a new device that requires services from the CPU, it is assigned an IRQ number, which enables the CPU to know which device is nagging it and requesting service. On occasion, devices may share an IRQ, provided both devices do not attempt to interact with the CPU at the same time. * Direct memory access (DMA): DMA channels allow certain devices to bypass the processor and access main memory directly. DMA devices have the intelligence to handle their own data transfers to memory. Some bus architectures allow more DMA channels than others, but two devices can’t share a DMA channel. * Input/Output (I/O) address: Assigned to a device via its expansion slot. The I/O address, also called an I/O port or hardware port, allows the CPU to send commands directly to the device by writing them to an assigned area in memory that the device checks frequently. The I/O address is a one-way-only line that works like a reverse IRQ. The CPU uses the I/O address to send a command to the device. If the device responds, it uses the data bus or DMA channel to do so. Only one device can be assigned to an I/O address. * Bus mastering: Allows one device to interact directly with another. Usually, the expansion card plugged into a slot has a bus master processor on the card that directs this activity.
Most modern motherboards, especially those with the PCI bus (see “Plugging into the expansion bus,” later in this chapter), support bus mastering because it improves performance.
Fun with Plug and Play
Plug and Play (PnP) is a configuration standard that allows the system BIOS and the operating system to configure expansion boards and other devices automatically so that the user or PC technician won’t have to worry about setting DIP switches, jumpers, and system resources (such as IRQ, I/O, addresses, and DMA). In effect, you just plug in the device or adapter card and play with it.
To use PnP on a system, four requirements must be met: * The system BIOS must support PnP. * The motherboard and its chipset must support PnP. * The operating system running on the PC must support PnP. * The bus of the expansion slot used must be compatible with PnP. Remember All versions of Windows since Windows 95 (including Windows 2000) fully support PnP (although Windows NT only partially supports it). PnP is compatible with ISA, EISA, MCA, PC Card (PCMCIA), and PCI devices and adapters. All PCI devices are PnP, but not all PnP devices are PCI devices.
Plugging into the expansion bus
For the exam, you need to know what differentiates one expansion bus architecture from another and which are the most commonly used types. Tip One bit of terminology adjustment is needed here: An expansion bus architecture is the same as an expansion slot type.
Several expansion architectures have been used in PCs over the years, including 8-bit, ISA, EISA, MCA, VLB, and PCI. When you open the PC’s case and look at the motherboard, the expansion slots you likely see are ISA, AGP, and PCI, as illustrated in Figure 5-2. A motherboard can often support several types of expansion slots.

Figure 5-2: The expansion slots most often found on a mother-board.
Here’s a brief description of each of the expansion slot architectures that has been used in PCs: * 8-bit bus: Not many of these left around, so don’t worry about it for the exam. * Industry Standard Architecture (ISA): Pronounced “ice-ah,” ISA was introduced with the IBM AT and called the AT bus in its early days; it provided a 16-bit data bus. As shown in Figure 5-3, the ISA bus is characterized by adding an additional short slot to a slot on the 8-bit bus to create the 16-bit connector. ISA added eight additional IRQs and doubled the number of DMA channels. ISA expansion cards were designated to the appropriate IRQ or DMA numbers through jumpers and DIP switches. The ISA architecture also separated the bus clock from the CPU clock to allow the slower data bus to operate at its own speeds. ISA slots are found on 286, 386, 486, and some Pentium PCs.

Figure 5-3: The ISA 16-bit card and slot. * Micro-Channel Architecture (MCA): Introduced with the IBM PS/2, MCA was the first 32-bit option. It featured bus mastering and a 10 MHz bus clock for expansion cards. The MCA expansion slot is about the same size as the ISA slot, but has about twice as many channels. MCA cards are also configured to their IRQ and DMA assignments by software, which is an improvement over the jumpers and DIPs of the ISA architecture. * Extended ISA (EISA): Pronounced “ee-sah,” this architecture was developed by a group of companies to overcome the limitations of ISA and compete with MCA. EISA takes the best parts of MCA and builds on them. It has a 32-bit data bus, uses software setup, has more I/O addresses available, and ignores IRQs and DMA channels. EISA uses only an 8 MHz bus clock to be backward compatible to ISA boards. (A device that is backward compatible supports all of its previous versions.) In this case, EISA supports ISA expansion boards along with its own. * VESA Local Bus (VLB or VL-bus): VLB was used first on 486 systems and grew from the need for the data bus to run at the same clock speed as the CPU. VLB was developed by the Video Electronics Standards Association (VESA) to place a port more or less directly on the system bus with what was called a bus slot or a processor direct slot. * Peripheral Component Interconnect (PCI) bus: Introduced with the Pentium PC, PCI is a local bus architecture that supports either a 32- or 64-bit bus, which allows it to be used with both 486 and Pentium computers. The PCI bus is also processor independent because of a special bridging circuit contained on PCI boards. Its bus speed is 33 MHz, giving it much higher throughput than earlier cards. The PCI architecture and expansion slot, shown in Figure 5-4, also support ISA and EISA cards. PCI cards are also PnP, which means they automatically configure themselves to the appropriate IRQ, DMA, and I/O port addresses.

Figure 5-4: The PCI card and slot. * Accelerated Graphics Port (AGP): Based on PCI, but designed specifically for supporting 3D graphics, AGP reduces the load on the PCI bus by providing a direct channel to the graphics controller. AGP uses a 32-bit channel with a base speed of 66 MHz, which translates to twice the PCI bandwidth of 133 MBps at 266 MBps in its 1X (1 times) mode. AGP 2X (2 times) provides 533 MBps, AGP 4X provides 1.07 GBps, and the newer AGP 8X (Pro) provides 2.2 GBps in bandwidth. * Universal Serial Bus (USB): The USB connectors are located externally on the PC’s case. Almost every newer PC has two to four USB ports available. Compared to other PC bus structures, USB has a few unique qualities: USB provides power to USB peripherals, communicates at data speeds of 1.5 Mbps to 12 Mbps, and USB devices are hot swappable and Plug and Play. * Audio Model Riser (AMR): While not technically a bus architecture, many newer motherboards now include AMR slots into which AMR riser cards can be inserted to add support for sound or modem functions. A PCI modem card or a sound card can be inserted into an AMR slot. * Communications Network Riser (CNR): CNR, while not a bus architecture, provides an on-motherboard slot through which LAN or home networking, DSL, USB, wireless communications, audio, or modem system can be implemented on a PC. The CNR slot, available on many newer motherboards, connects through the USB bus to accept modems and networking devices configured from CNR slots.
For the exam, remember the bus width in bits for each bus structure, especially the ones that are 32 or more bits. Table 5-1 summarizes the basic characteristics of the bus structures discussed earlier. Table 5-1: Bus Architecture Characteristics | Bus | Bus Width (bits) | Bus Speed (MHz) | How Configured | 8-bit | 8 | 8 | Jumpers and DIP switches | ISA | 16 | 8 | Jumpers and DIP switches | MCA | 32 | 10 | Software | EISA | 32 | 8 | Software | VL-Bus | 32 | Processor speed | Jumpers and DIP switches (up to 40 MHz) | PCI | 32/64 | Processor speed | PnP (up to 33 MHz) | USB | Serial | Serial | PnP | AGP | 32 | 66 MHz | PnP |
Upgrading notebooks and portables
The PC Card, or its original name PCMCIA (Personal Computer Memory Card International Association) bus, adds external devices to a notebook or hand-held computer. PC cards (which are about the size of a credit card) add memory, modems, network interface cards, and even hard disk drives to portable computers. These cards slide into slots that are usually on the side of a notebook computer. The three PC Cards standards are * Type I: Cards that are 3.3 mm thick and used for memory additions. Type I cards have a single row of connectors. * Type II: Cards that are 5 mm thick and used primarily to add modems or network interface cards (NICs). Type II cards have two rows of connectors. * Type III: Cards that are up to 10.5 mm thick and used to add an external hard drive to a notebook computer. Type III cards have four rows of connectors. Tip Expect a test question on the type of devices supported by the PC Card (PCMCIA) types. Instant Answer You can hot swap PC Cards, which means you can remove or insert them with the system’s power on.
Using SCSI
The Small Computers System Interface (SCSI, pronounced “skuzzy”) is an interface and not technically an architecture. It connects a wide variety of internal and external devices, such as CD-ROM drives, printers, and scanners. Depending on the SCSI standard in use, up to 7 to 15 different SCSI devices can be attached in a daisy-chain fashion to the host adapter card installed in PC’s expansion slot. SCSI is a technology for interfacing multiple devices through a single connection on the motherboard. SCSI adapter cards can be PCI, VL-Bus, EISA, or ISA.
Bus interfacing
Most of the later PC systems (486 and later) support multiple bus interfaces. On these systems, provisions must be made to interconnect the different bus architectures and allow their devices to communicate with one another. This is accomplished using a bridge, which connects two dissimilar systems. The most common bridge is the PCI-ISA bridge supplied by the chipset in virtually all Pentium systems. To see the interface bridges on your PC, use the Windows Device Manager and access the System Devices tab, as shown in Figure 5-5. The Windows Device Manager lists the controllers and bridges supplied by the chipset.

Figure 5-5: The Windows Device Manager’s System Devices tab shows the device bridges included on the chipset.