Requester:
Ann Portia Yturiaga Dinglasan <Ann.Dinglasan@finisar.com>
Sample Module Submitted:
FTLF1318P2BTL
Date: August 16th, 2013
Prepare by: Chew Yoon Kit
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Solution details
After sample module finish Module testing, sample module will proceed for Label test. In Label test, sample module will proceed with standard labeling test without customization; 1. Initialize the MapDef 2. Serial number checking 3. Part number checking 4. Memory map archive which include; a. EEPROM [Table 0] b. FCC Albany [Table 0 to 33] 5. EEPROM check with reference file 6. FCC table check with reference file
Sample module will proceed to Custom Label test which test include; 1. Initialize the MapDef 2. Serial number checking
Later sample module will proceed to Barcode test which test include; 1. Initialize the MapDef 2. Serial number checking 3. Part number checking
Suspected area which may corrupt EEPROM; 1. Serial number checking 2. Part number checking 3. Memory map archive 4. EEPROM checking
*Note: Not likely will corrupt EEPROM since it’s just only read access the EEPROM only*
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Strategy [I] Simulate 20,000 cycles of continuous read and compare; 1. Serial number checking 2. Part number checking 3. EEPROM check with reference file
Application: | FinTest version 12.148.00 | | Spec File: | FTLF1318P2BTL Rev. BY | | Machine: | Jarvis03 | | Observation: | No error or EEPROM corrupt occurs | |
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Strategy [II] Simulate 20,000 cycles of continuous compare, read, write, compare, archive, power down module; 1. EEPROM check with reference file 2. Serial number checking 3. Part number checking 4. Program EEPROM 5. EEPROM check with reference file 6. Memory Map Archive 7. Remove DUT Power
Application: | FinTest version 12.148.00 | | Spec File: | FTLF1318P2BTL Rev. BY (modify) | | Machine: | Jarvis03 | | Observation: | No error or EEPROM corrupt occurs | |
