CHAPTER 2

2.1 GENERATION OF BLOCK DIAGRAM

2.1.1 TRANSMITTER SECTION In the transmitter end power supply is used to supply suitable power to the Microcontroller. A keypad is interfaced to the controller to send signals for the movement of the robot in four directions. A buzzer is also interfaced as an indicator so that we can have a buzz whenever a signal is sent. The output from the controller is given to the FM transmitter where it is modulated and sent.
2.1.2 RECEIVER SECTION
Here in the receiver section, the FM signal sent from the transmitter section is received by the FM receiver and fed to the controller and a battery is used to supply power to the controller. The output from the controller is fed to the motor driver circuit which intern is connected to the motor.

2.2 BLOCK DIAGRAM

RECEIVER SECTION

2.3 Hardware Description
The hardware part mainly consists of the components that are used in designing the vehicle i.e., a prototype model which moves in four directions. The major sections in this hardware part are the transmitter section and the receiver section; in both of these sections a microcontroller called AT89S52 is incorporated.

2.4 Software Description Keil Micro Vision is an integrated development environment used to create software to be run on embedded systems (like a microcontroller). It allows for such software to be written either in assembly or C programming languages and for that software to be simulated on a computer before being loaded onto the microcontroller.

2.5 CONCLUSION
Thus the generation of the block diagram and its description has been dealt in this chapter using hardware and its implementation using software.

CHAPTER 3
3.1 DESCRIPTION OF AT89S52
Looking back into the history of microcomputers, one would at first come across the development of microprocessor i.e. the processing element, and later on the peripheral devices. The three basic elements-the CPU, I/O devices and memory-have developed in distinct directions. While the CPU has been the proprietary item, the memory devices fall into general-purpose category and the I/O devices may be grouped somewhere in-between.
The AT89S52 is a low-power, high-performance CMOS 8-bit microcomputer with 8K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcomputer, which provides a highly flexible and cost-effective solution to many embedded control applications.
The AT89S52 provides for 4k EPROM/ROM, 128 byte RAM and 32 I/O lines. It also includes a universal asynchronous receive-transmit (UART) device, two 16-bit timer/counters and elaborate interrupt logic. Lack of multiply and divide instructions which had been always felt in 8-bit microprocessors/micro controllers, has also been taken care of in the 89S52- Thus the 89S52 may be called nearly equivalent of the following devices on a single chip: 8085 + 8255 + 8251 + 8253 + 2764 + 6116.

3.2 AT89S52 Silent Features
• Compatible with MCS-51 Products
• 8K Bytes of In-System Programmable (ISP) Flash Memory– Endurance: 1000 Write/Erase Cycles
• 4.0V to 5.5V Operating Range
• Fully Static Operation: 0 Hz to 33 MHz
• Three-level Program Memory Lock
• 256K Internal RAM
• 32 Programmable I/O Lines
• 3 16-bit Timer/Counters
• Eight Interrupt Sources
• Full Duplex UART Serial Channel
• Low-power Idle and Power-down Modes
• Interrupt Recovery from Power-down Mode
• Watchdog Timer
• Dual Data Pointer
• Power-off Flag

3.3. INTERNAL BLOCK DIAGRAM

figure 3. Architecture of 89S52
The AT89S52 provides the following standard features: 8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM contents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset.

3.4 PIN DESCRIPTION OF MICROCONTROLLER 89S52 Figure 4. Pin configuration of 89S52

VCC Supply voltage.
GND
Ground.
Port 0 Port 0 is an 8-bit open drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1 sare written to port 0 pins, the pins can be used as high impedance inputs. Port 0 can also be configured to be the multiplexed low order address/data bus during accesses to external program and data memory. In this mode, P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pull-ups are required during program verification.
Port 1 Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 Output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the internal pull-ups and can be used as inputs. In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input P1.1/T2EX), respectively, as shown in the following table. Port 1 also receives the low-order address bytes during Flash programming and verification. Table 1. Port 1 Details

Port 2
Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal pull-ups and can be used as inputs. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.
Port 3 Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written 1s are written to Port 3 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups. Port 3 also serves the functions of various special features of the AT89S52, as shown in the following table.
Port 3 also receives some control signals for Flash programming and verification. Table 2 . Port 3 Details

RST Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device.
ALE/PROG
Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation, ALE is emitted at a constant rate of1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location
8EH. with the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the micro controller is in external execution mode.
PSEN
Program Store Enable (PSEN) is the read strobe to external program memory. When the AT89S52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.
EA/VPP
External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. A should be strapped to VCC for internal program executions. This pin also receives the 12-voltProgramming enables voltage (VPP) during Flash programming.

XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.
Oscillator Characteristics
XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier that can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an External clock source, XTAL2 should be left unconnected while XTAL1 is driven, as shown in Figure 7. Figure 5. Oscillator Connections

Special Function Register (SFR) Memory Special Function Registers (SFR s) are areas of memory that control specific functionality of the 8051 processor. For example, four SFRs permit access to the 8051’s 32 input/output lines. Another SFR allows the user to set the serial baud rate, control and access timers, and configure the 8051’s interrupt system. The Accumulator
The Accumulator, as its name suggests is used as a general register to accumulate the results of a large number of instructions. It can hold 8-bit (1-byte) value and is the most versatile register. The “R” registers The “R” registers are a set of eight registers that are named R0, R1. Etc up to R7. These registers are used as auxiliary registers in many operations. The “B” registers
The “B” register is very similar to the accumulator in the sense that it may hold an 8-bit (1-byte) value. Two only uses the “B” register 8051 instructions: MUL AB and DIV AB. The Data Pointer The Data pointer (DPTR) is the 8051’s only user accessible 16-bit (2Bytes) register. The accumulator, “R” registers are all 1-Byte values. DPTR, as the name suggests, is used to point to data. It is used by a number of commands, which allow the 8051 to access external memory.

THE PROGRAM COUNTER AND STACK POINTER The program counter (PC) is a 2-byte address, which tells the 8051 where the next instruction to execute is found in memory. The stack pointer like all registers except DPTR and PC may hold an 8-bit (1-Byte) value.
ADDRESSING MODES An “addressing mode” refers that you are addressing a given memory location. In summary, the addressing modes are as follows, with an example of each:
Each of these addressing modes provides important flexibility.
Immediate Addressing MOV A, #20 H Direct Addressing MOV A, 30 H
Indirect Addressing MOV A, @R0 Indexed Addressing a. External Direct MOVX A, @DPTR b. Code In direct MOVC A, @A+DPTR Immediate Addressing
Immediate addressing is so named because the value to be stored in memory immediately follows the operation code in memory. That is to say, the instruction itself dictates what value will be stored in memory. For example, the instruction: MOV A, #20H:

14
This instruction uses immediate Addressing because the accumulator will be loaded with the value that immediately follows in this case 20(hexadecimal). Immediate addressing is very fast since the value to be loaded is included in the instruction. However, since the value to be loaded is fixed at compile-time it is not very flexible.
Direct Addressing Direct addressing is so named because the value to be stored in memory is obtained by directly retrieving it from another memory location. For example: MOV A, 30h This instruction will read the data out of internal RAM address 30(hexadecimal) and store it in the Accumulator. Direct addressing is generally fast since, although the value to be loaded isn’t included in the instruction, it is quickly accessible since it is stored in the 8051’s internal RAM. It is also much more flexible than Immediate Addressing since the value to be loaded is whatever is found at the given address which may variable. Also it is important to note that when using direct addressing any instruction that refers to an address between 00h and 7Fh is referring to the SFR control registers that control the 8051 micro controller itself.
Indirect Addressing Indirect addressing is a very powerful addressing mode, which in many cases provides an exceptional level of flexibility. Indirect addressing is also the only way to access the extra 128 bytes of internal RAM found on the 8052. Indirect addressing appears as follows: MOV A, @R0:

This instruction causes the 8051 to analyze Special Function Register (SFR) Memory: Special Function Registers (SFRs) are areas of memory that control specific functionality of the 8051 processor. For example, four SFRs permit access to the 8051’s 32 input/output lines. Another SFR allows the user to set the serial baud rate, control and access timers, and configure the 8051’s interrupt system.
Timer 2 Registers
Control and status bits are contained in registers T2CON and T2MOD for Timer 2 . The register pair (RCAP2H , RCAP2L) are the Capture / Reload registers for Timer 2 in 16-bit capture mode or 16-bit auto-reload mode .
Interrupt Registers:
The individual interrupt enable bits are in the IE registe . Two priorities can be set for each of the six interrupt sources in the IP register.

Figure 6. Interrupt registers

Timer 2
Timer 2 is a 16-bit Timer / Counter that can operate as either a timer or an event counter. The type of operation is selected by bit C/T2 in the SFR T2CON . Timer 2 has three operating Modes : capture , auto-reload ( up or down Counting ) , and baud rate generator . The modes are selected by bits in T2CON . Timer 2 consists of two 8-bit registers , TH2 and TL2 . In the Timer function , the TL2 register is incremented every machine cycle . Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator frequency. In the Counter function , the register is incremented in response to a 1-to-0 transition at its corresponding external input pin , T2 .When the samples show a high in one cycle and a low in the next cycle, the count is incremented . Since two machine cycles (24 Oscillator periods ) are required to recognize 1-to-0 transition , the maximum count rate is 1 / 24 of the oscillator frequency . To ensure that a given level is sampled at least once before it changes , the level should be held for atleast one full machine cycle .

Capture Mode
In the capture mode , two options are selected by bit EXEN2 in T2CON . If EXEN2 = 0, Timer 2 is a 16-bit timer or counter which upon overflow sets bit TF2 in T2CON . This bit can then be used to generate an interrupt . If EXEN2 = 1 , Timer 2 performs the same operation , but a 1-to-0 transition at external input T2EX also causes the current value in TH2 and TL2 to be captured into RCAP2H and RCAP2L , respectively.

Auto-reload (Up or Down Counter)
Timer 2 can be programmed to count up or down when configured in its 16-bit auto-reload mode. This feature is invoked by the DCEN (Down Counter Enable) bit located in the SFR T2MOD . Upon reset , the DCEN bit is set to 0 so that timer 2 will default to count up. When DCEN is set , Timer 2 can count up or down , depending on the value of the T2EX pin . In this mode , two options are selected by bit EXEN2 in T2CON . If EXEN2 = 0 , Timer 2 counts up to 0FFFFH and then sets the TF2 bit upon overflow . If EXEN2 = 1 , a 16-bit reload can be triggered either by an overflow or by a 1-to-0 transition at external input T2EX.

Baud Rate Generator
Timer 2 is selected as the baud rate generator by setting TCLK and/or RCLK in T2CON . Note that the baud rates for transmit and receive can be different if Timer 2 is used for the receiver or transmitter and Timer 1 is used for the other function .The baud rates in Modes 1 and 3 aredetermined by Timer 2’s overflow rate according to the following equation .Modes 1 and 3 Baud Rates =Timer 2 Overflow Rate
The timer operation is different for Timer 2 when it is used as a baud rate generator .Normally ,as a timer , it increments every machine cycle (at 1/12 the oscillator frequency).As a baud rate generator , however, it increments every state time ( at 1/2 the oscillator frequency ) .

Timer 0
Timer 0 functions as either a timer or event counter in four modes of operation . Timer 0 is controlled by the four lower bits of the TMOD register and bits 0, 1, 4 and 5 of the TCON register.

Mode 0 ( 13-bit Timer)

Mode 0 configures timer 0 as a 13-bit timer which is set up as an 8-bit timer (TH0 register) with a modulo 32 prescaler implemented with the lower five bits of the TL0 register . The upper three bits of TL0 register are indeterminate and should be ignored . Prescaler overflow increments the TH0 register.

Mode 1 ( 16-bit Timer )
Mode 1 is the same as Mode 0, except that the Timer register is being run with all 16 bits . Mode 1 configures timer 0 as a 16-bit timer with the TH0 and TL0 registers connected in cascade . The selected input increments the TL0 register.

Mode 2 (8-bit Timer with Auto-Reload)

Mode 2 configures timer 0 as an 8-bit timer ( TL0 register ) that automatically reloads from the TH0 register . TL0 overflow sets TF0 flag in the TCON register and reloads TL0 with the contents of TH0 , which is preset by software.

Mode 3 (Two 8-bit Timers )

Mode 3 configures timer 0 so that registers TL0 and TH0 operate as separate 8-bit timers. This mode is provided for applications requiring an additional 8-bit timer or counter.

Timer 1 Timer 1 is identical to timer 0 , except for mode 3 , which is a hold-count mode .

Mode 3 (Halt) Placing Timer 1 in mode 3 causes it to halt and hold its count . This can be used to halt Timer 1 when TR1 run control bit is not available i.e. , when Timer 0 is in mode 3 .
Baud Rates
The baud rate in Mode 0 is fixed. The baud rate in Mode 2 depends on the value of bit SMOD in Special Functio Register PCON. If SMOD = 0 (which is its value on reset), the baud rate is 1/64 the oscillator frequency . If SMOD = 1, the baud rate is 1/32 the oscillator frequency. In the 89S52 , the baud rates in Modes 1 and 3 are determined by the Timer 1 overflow rate. In case of Timer 2 , these baud rates can be determined by Timer 1 , or by Timer 2 , or by both (one for transmit and the other for receive ).

TCON REGISTER
Timer/counter Control Register

Table3: Tcon register

3.4 Hardware Details
The on chip oscillator of 89S52 can be used to generate system clock. Depending upon version of the device, crystals from 3.5 to 12 MHz may be used for this purpose. The system clock is internally divided by 6 and the resultant time period becomes one processor cycle. The instructions take mostly one or two processor cycles to execute, and very occasionally three processor cycles. The ALE (address latch enable) pulse rate is 16th of the system clock, except during access of internal program memory, and thus can be used for timing purposes.
AT89S52 Serial port pins
PIN ALTERNATE USE SFR
P3.ORXD Serial data input SBUF
P3.ITXD Serial data output SBUF
P3.2INTO External interrupt 0 TCON-1
P3.3INT1 External interrupt 1 TCON- 2
P3.4TO External timer 0 input TMOD
P3.5T1 External timer 1 input TMOD
P3.6WR External memory write pulse ---------
P3.7RD External memory read pulse ----
Table 4 – AT89S52 serial port pins

The two internal timers are wired to the system clock and pre scaling factor is decided by the software, apart from the count stored in the two bytes of the timer control registers. One of the counters, as mentioned earlier, is used for generation of baud rate clock for the UART. It would be of interest to know that the 8052 have a third timer, which is usually used for generation of baud rate.
The reset input is normally low and taking it high resets the micro controller, in the present hardware, a separate CMOS circuit has been used for generation of reset signal so that it could be used to drive external devices as well.
3. 5 Writing the software
The 89S52 has been specifically developed for control applications. As mentioned earlier, out of the 128 bytes of internal RAM, 16 bytes have been organized in such a way that all the 128 bits associated with this group may be accessed bit wise to facilitate their use for bit set/reset/test applications. These are therefore extremely useful for programs involving individual logical operations. One can easily give example of lift for one such application where each one of the floors, door condition, etc may be depicted by a single hit.
The 89S52 has instructions for bit manipulation and testing. Apart from these, it has 8-bit multiply and divide instructions, which may be used with advantage. The 89S52 has short branch instructions for 'within page' and conditional jumps, short jumps and calls within 2k memory space which are very convenient, and as such the controller seems to favor programs which are less than 2k byte long. Some versions of 8751 EPROM devices have a security bit which can be programmed to lock the device and then the contents of internal program EPROM cannot be read.The device has to be erased in full for further alteration, and thus it can only be reused but not copied. EEPROM and FLASH memory versions of the device are also available now.

3
3.6 Memory unit
Memory is part of the micro controller whose function is to store data. The easiest way to explain it is to describe it as one big closet with lots of drawers. If we suppose that we marked the drawers in such a way that they cannot be confused, any of their contents will then be easily accessible. It is enough to know the designation of the drawer and so its contents will be known to us for sure.
Memory components are exactly like that. For a certain input we get the contents of a certain addressed memory location and that’s all. Two new concepts are brought to us: addressing and memory location. Memory consists of all memory locations, and addressing is nothing but selecting one of them. This means that we need to select the desired memory location on one hand, and on the other hand we need to wait for the contents of that location. Besides reading from a memory location, memory must also provide for writing onto it. This is done by supplying an additional line, called control line. We will designate this line as R/W (read/write). Control line is used in the following way: if r/w=1, reading is done, and if opposite is true then writing is done on the memory location. Memory is the first element, and we need a few operation of our micro controller.
3.7 Central Processing Unit
Let add 3 more memory locations to a specific block that will have a built in capability to multiply, divide, subtract, and move its contents from one memory location onto another. The part we just added in is called “central processing unit” (CPU). Its memory locations are called registers.
Registers are therefore memory locations whose role is to help with performing various mathematical operations or any other operations with data wherever data can be found. Look at the current situation. We have two independent entities (memory and CPU), which are interconnected, and thus any exchange of data is hindered, as well as its functionality. If, for

Example, we wish to add the contents of two memory locations and return the result again back to memory, we would need a connection between memory and CPU. Simply stated, we must have some “way” through data goes from one block to another.
3.8 Bus
That “way” is called “bus”. Physically, it represents a group of 8, 16, or more wires. There are two types of buses: address and data bus. The first one consists of as many lines as the amount of memory we wish to address and the other one is as wide as data, in our case 8 bits or the connection line. First one serves to transmit address from CPU memory, and the second to connect all blocks inside the micro controller.
3.9 Input-output unit
Those locations we’ve just added are called “ports”. There are several types of ports: input, output or bi-directional ports. When working with ports, first of all it is necessary to choose which port we need to work with, and then to send data to, or take it from the port. When working with it the port acts like a memory location. Something is simply being written into or read from it, and it could be noticed on the pins of the micro-controller.