Voltage and Current Stress Induced Variations in Tin/Hfsixoy/Tin Mim Capacitors
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Voltage and current stress induced variations in TiN/HfSixOy/TiN MIM capacitors
D. Misra a,b,⇑, Jyothi Bagade a, A.N. Chandorkar a a b
Center of Excellence in Nanoelectronics, Electrical Engineering Department, Indian Institute of Technology Bombay, Powai, Mumbai 400 076, India Department of Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, NJ 07102, USA
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In this paper we have investigated the long-term reliability of TiN/HfSixOy/TiN Metal–Insulator–Metal (MIM) capacitors by using constant voltage stress (CVS) and constant current stress (CCS). No significant increase in leakage current was observed as a function of stress time. On the other hand, stress induced capacitance changes were observed due to change in quadratic and liner coefficients of permittivity nonlinearities. Stress-induced oxygen vacancy related defect formation believed to be the cause of this shift in permittivity. Ó 2012 Published by Elsevier Ltd.
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Article history: Received 22 February 2011 Received in revised form 23 June 2012 Accepted 23 August 2012 Available online xxxx
1. Introduction Recently, Metal–Insulator–Metal (MIM) capacitors with high-k gate dielectrics are of significant interest for memory devices [1] and radio frequency (RF) applications to enhance the capacitance density [2]. It is because, these MIM capacitors show significant improvements compared to double poly linear capacitors because of reduction in series resistance. MIM capacitors also demonstrate lower parasitic capacitance due to reduced substrate coupling [3]. In addition, introduction of high-k dielectric materials enhances the capacitance density compared to low permittivity materials such as silicon nitride or oxide/nitride/oxide (ONO) dielectric stack thereby increasing the circuit density and reducing the cell size. Hafnium oxide-based dielectrics have been extensively studied for gate stacks in MOSFETs. Because of an interfacial layer between the high-k layer and the silicon substrate these high-k oxides behave differently. Exchange of oxygen and oxygen-related defects between the high-k layer and the interfacial layer tend to modify the properties of the high-k dielectrics [4]. The reliability characteristic of a high-k gate stack, therefore, is quite different because the degradation mechanism in the gate stack is dominated by the trap creation in the interfacial layer. It is more prominent when the gate stack is subjected to stress. On the other hand, when a high-k dielectric film is deposited on a bottom metal electrode to form the MIM capacitors, any interfacial layer formation due to exchange of oxygen is eliminated [4]. It is easy to evaluate the high-k film in the absence of the interfacial layer. The reliability characteristics of high-k dielectrics in MIM structures are still evolving. When Mondon and Blonkowski evalu⇑ Corresponding author at: Department of Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, NJ 07102, USA. E-mail address: dmisra@ieee.org (D. Misra).
0026-2714/$ - see front matter Ó 2012 Published by Elsevier Ltd. http://dx.doi.org/10.1016/j.microrel.2012.08.020
ated HfO2 and compared its results with that of Al2O3–HfO2 stacked layers with TiN electrodes, they observed that these devices wearout rapidly during constant voltage stress (CVS) with film thickness below 6 nm [5]. Aluminum-added hafnium oxide (HfAlO) was evaluated for MIM capacitor reliability by Takeda et al. where an increase in permittivity during voltage stress due to an increase in dielectricloss was observed [6]. Permittivity variation is also reported in highk dielectrics with additional material incorporation such as moisture absorption [7] and nitrogen incorporation [8]. It was also reported that in MIM capacitors voltage stress does not change stress induced leakage current significantly [9]. In this work we present the reliability data based on both voltage and current stress measurements of TiN/HfSixOy/TiN MIM capacitors. Even though we did not observe any significant change in leakage current for either of the stress types the charge to breakdown in both cases was identical. On the other hand current stress induced capacitance changes were observed due to a shift in dielectric constant.
2. Experimental A 4 nm of HfSixOy (10% SiO2) dielectric film was deposited by atomic layer deposition (ALD) on TiN using a TEMA (Hf[N(CH3) (C2H5)]4) precursor and O3 oxidation method for MIM structures [4]. A 10 nm layer of TiN was deposited by ALD at 530 °C. The ALD process utilized TiCl4 and NH3 chemistry for metal deposition. The deposition rate of TiN films was observed to be $1.2 Å per cycle. They were subjected to 800 °C post-deposition annealing (PDA) in N2 ambient for 60 s. ALD TiN was used as the bottom and top electrodes. All the electrical measurements were performed by using an Agilent 4156C semiconductor parameter analyzer and an Agilent 4284a LCR meter.
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Please cite this article in press as: Misra D et al. Voltage and current stress induced variations in TiN/HfSixOy/TiN MIM capacitors. Microelectron Reliab (2012), http://dx.doi.org/10.1016/j.microrel.2012.08.020
D. Misra et al. / Microelectronics Reliability xxx (2012) xxx–xxx
3. Results and discussion Fig. 1a shows the leakage current measured for MIM capacitors after 3000 s and 5000 s at 2.5 V constant voltage stress applied to the top electrode and Fig. 1b shows the leakage current after 1900 s and 2300 s at 1.5 mA constant current stress (CCS). The gate current was also measured periodically interrupting stress voltage on MIM capacitors. No change in gate current was observed for both the stress types. Once the HfO2 dielectric went into thermal hard breakdown (HBD), a sudden increase in leakage current, Ig (almost 3–4 orders of magnitude) was observed (not shown). As reported earlier, we believe stress induced leakage current (SILC) is limited in MIM capacitors [4]. Because of large intrinsic trap concentration in the dielectric and/or insignificant trap creation during stress, the change in leakage current due to both types is minimal. The breakdown field for these MIM capacitors was found to be around 7.25 MV/cm from ramped voltage stress measurements [9]. Stress voltage of 2.5 V that is equivalent of an electric field of 6.25 MV/cm was, therefore, selected to study breakdown characteristics, which was lower than the breakdown field. Note that unlike the gate stacks these devices were without any interfacial layer. This allowed investigating the stress-induced degradation exclusively for the high-k layer. Fig. 2 depicts a typical breakdown behavior for both CVS (Fig. 2a) and CCS (Fig. 2b) for the MIM capacitors. A minimal change in stress current and no signatures of soft breakdown (SBD) or progressive breakdown that occurs seconds prior to hard breakdown (HBD) was observed. It is known that the breakdown of MIM capacitors is primarily controlled by the electric field rather than charge fluence [10]. Therefore, a clean breakdown was observed in our case for both the stress types. The dc conductance of the high-k film was measured as a function of applied voltage for both CVS and CCS. Fig. 3 shows the conductance for both the stress types. There was no significant increase as a function of stress time for both the stress types. It can be seen that conductance is almost uniform between À1 and +1 voltage,
Fig. 2. A typical breakdown characteristic for both CVS (a) and CCS (b) for the MIM capacitors.
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Fig. 3. DC conductance as a function of gate voltage for both CVS (a) and CCS (b) for the MIM capacitors.
Fig. 1. The leakage current measured for two different devices after 3000 s and 5000 s at 2.5 V CVS (a) and after 1900 s and 2300 s at 1.5 mA of CCS (b).
which can be attributed to tunneling through the dielectric. The high-k layer, without the exposure to stress, typically has a considerable intrinsic trap density related to oxygen vacancies. The tunneling in high-k layer at low voltages, therefore, is mainly due to trap assisted tunneling [4]. When the voltage was increased across the dielectric a marginal increase in conductance was observed because of possible dominance of Fowler–Nordheim (F–N) tunneling [9]
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Please cite this article in press as: Misra D et al. Voltage and current stress induced variations in TiN/HfSixOy/TiN MIM capacitors. Microelectron Reliab (2012), http://dx.doi.org/10.1016/j.microrel.2012.08.020
MR 10661 8 September 2012
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Recovery after 10 h stress interruption TiN/HfSiO/TiN 40A 1x10 cm 800C PDA CVS 2.5V 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05
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Stress time [sec]
Fig. 4. I–t characteristics under CVS applied with stress levels of 2.5 V. Inset shows I–t immediately before HBD. 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137
since the increase in stress induced trap creation is minimal as described earlier. It is known that Hf-based high-k dielectrics have a large concentration of intrinsic traps because of their bond structure and presence of oxygen-related defects. These traps, however, are shallow traps and room temperature de-trapping occurs with time or when a reverse potential is applied. It can be noted that for both CVS and CCS the observed stress induced trap creation was negligible. In order to verify that there is no additional trap creation, we applied a constant voltage stress till hard breakdown for the MIM capacitors as shown in Fig. 4. Very little increase in leakage current, Ig was observed during CVS till breakdown. After a 10-h interruption (Fig. 4) this resulted in almost complete recovery of Ig. This is in contrast to the observations made for the high-k gate stacks, where only partial recovery was observed [9]. The inset of Fig. 4 shows that Ig does not show signatures of any progressive
Fig. 6. Voltage dependent permittivity modifications after a 3000 and 5000-s constant voltage stress (a) at 2.5 V and after 1900 and 2300 s of constant current stress (b) at 1.5 mA for 3.06 Â 10À5 cm2 area MIM devices.
Fig. 5. Normalized capacitance change as function of gate voltage after a 3000 and 5000 s constant voltage stress at 2.5 V (a) and after 1900 and 2300 s of constant current stress at 1.5 mA (b) for 13.06 Â 10À5 cm2 capacitance area devices. Inset shows a typical voltage dependent capacitance before any stress is applied.
breakdown (PBD) before HBD, which is also different from I–t characteristics observed during time dependent dielectric breakdown (TDDB) of high-k gate stacks [11]. MIM capacitors at 1 MHz showed nonlinearity for voltage dependence of capacitance as a function of dc applied bias (Fig. 5a inset). The well-known nonlinearity characteristics [(C À C0)/C0] = aV2 + bV, where C0 is the capacitance at V = 0, a and b are second and first-order voltage coefficients of capacitance (VCC) respectively, was applied in our case. A minor variation of b was, however, observed for positive applied voltage. The origin of this nonlinearity can be due the presence of defect sites near the metal–insulator interface, oxygen vacancies or nonlinearities of the metal–oxygen bond polarizability [12,13]. Significant change in capacitance as function of constant voltage stress at 2.5 V was observed after a 3000 and 5000 s as shown in Fig. 5a. A large variation with respect to gate voltage was observed for both the stress durations. This indicates a clear dependence on the stress voltage (field) and stress time. Constant current stress at 1.5 mA for 13.06 Â 10À5 cm2 area MIM devices for 1900 and 2300 s was shown in Fig. 5b. DC/Cin also shows a variation with gate voltage for both the stress durations. As discussed earlier, since no change in the stress induced leakage current and limited trap creation was observed during stress, it is possible that the change in capacitance observed in Fig. 5 could be due to the change in nonlinearity in permittivity induced by stress. The voltage dependent change in relative permittivity plotted between ±1.5 V for both constant voltage stress and constant current stress is shown in Fig. 6. The voltage dependence of permittivity is parabolic and can also be expressed as K = K0 (a0 V2 + b0 V + 1), where K0 is the minimum permittivity or at V = 0, a0 and b0 are quadratic and liner coefficients of permittivity. This is identical to the voltage nonlinearity of capacitance as discussed earlier. The nonlinearity is mainly due to electrode polarization mechanism [12]. It is possible that the oxygen vacancies, that are created during the stress [14] contributed to the nonlinearity. In addition, it is
Please cite this article in press as: Misra D et al. Voltage and current stress induced variations in TiN/HfSixOy/TiN MIM capacitors. Microelectron Reliab (2012), http://dx.doi.org/10.1016/j.microrel.2012.08.020
known that the mobile charge carriers at the origin of the electrode polarization are related to oxygen vacancy defects [12]. Within the voltage range used, the permittivity increased for both the stress types but followed the stress level. In case of CCS, it is more prominent. The capacitance values at zero bias in Fig. 6 confirm a change in dielectric constant due to stress. Trapped charges in the dielectric can generate dipoles that can modify the nonlinearity of permittivity [15] during CCS. As the stress increases stress-induced defect sites increases that in turn increases the nonlinearity of permittivity even further. It can be pointed out that the variation of this nonlinearity is strongly frequency dependent even though a single frequency (1 MHz) is used in our case. Takeda et al. [6] suggest that the origin of increase in nonlinear coefficients of permittivity is the oxygen vacancies and/or oxygen interstitials. From our results it is clearly evident that defect creation alone is not responsible for the shift in permittivity. At high stress levels it is possible that Ti from TiN metal electrodes can diffuse into the high-k dielectric. SIMS measurements (not shown) suggest that a small penetration of Ti into the dielectric closer to the interface. Process dependence Ti penetration into HfO2 was also observed [16]. We believe Ti diffusion also plays a role during stress. The results obtained by Kimmel et al. [17] suggest that Ti in Hf-based dielectrics induces an increase of the values of the components of static permittivity tensor thereby increasing the nonlinearity in permittivity. The increase of this nonlinearity can also related to the off-center position of Ti ion in the Hf site. This change in permittivity can cause an increase in dielectric-loss [6]. 4. Summary The long-term reliability of TiN/HfSixOy/TiN MIM capacitors was investigated by using constant voltage stress and constant current
stress measurements. No significant increase in leakage current was observed as a function of stress time. On the other hand stress induced capacitance changes were observed due to an increase in nonlinearity in permittivity. Creation of excess oxygen vacancy defects and possible diffusion of Ti from TiN metal electrodes at higher stress levels seems to be the cause of the variation in permittivity. For MIM capacitors, under CCS and CVS, the impact can be quite different as compared to gate stacks on silicon substrates. References
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Please cite this article in press as: Misra D et al. Voltage and current stress induced variations in TiN/HfSixOy/TiN MIM capacitors. Microelectron Reliab (2012), http://dx.doi.org/10.1016/j.microrel.2012.08.020
