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Computer Architecture

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NAME: BOLAJI ABIODUN FOLORUNSO
COURSE: COMPUTER ARCHITECTURE.

INTRODUCTION
As computer architectures become increasingly complex, more sophisticated analysis methods and optimization tools are required to harness their full performance. Technologies such as event-based sampling and expert systems are now augmenting traditional methods of performance analysis based upon profile and call graph tools. Understanding the basics of performance analysis, as well as the current state- of-the-art software optimization technologies, enables developers to pinpoint and implement solutions to application performance issues.
One sophisticated processor, the Intel® Pentium® M processor, is growing in embedded application usage due to its high performance and low power utilization. The Intel Pentium M processor features Intel MMX™ and Streaming SIMD Extensions (SSE, SSE2) that enable higher performance through parallel computation. Getting the most out of the processor, however, requires that developers take full advantage of these built-in performance enhancements.
Software optimization technology offered by advanced compilers utilizes the enhancements in Intel Pentium M processors in a fashion conducive to embedded development. Compiler technology provides access to these extensions with low development investment while maintaining backward compatibility and minimal code size, two critical challenges in embedded software development. The key to focusing the optimization process, however, is to perform performance analysis.
Performance analysis is the study of application performance on hardware with the end goal of understanding issues and recommending enhancements. Amdahl’s L aw states that performance improvement is limited by the frequency of execution of the improved region and serves as motivation for the following two key insights of performance analysis:
Optimize the most frequently executed regions - the best return on investment for performance enhancement is the optimization of these regions.
Know when to stop - calculating the limit on overall performance gain balances tradeoffs between meeting performance goals and effort to optimize.
For example, if an application comprises two phases that execute in the same amount of time, optimization efforts aimed at only one phase will inevitably return less than two times overall application speedup. If greater performance is desired, optimization efforts should also target the second phase.
Finding the most frequently executed regions of application code commonly employs profiling and typically involves some kind of runtime monitoring of the application. Traditional profiles return metrics such as the amount of time spent in individual functions and the number of times each function is called. The Intel Pentium M processor features a set of built-in performance monitoring counters that can generate profiles based upon processor events such as instructions retired, branch mis-predictions, and cache misses. To collect these event-based profiles:
The user specifies events to monitor and an interval at which to collect an event sample during the application execution.
The processor executes the application. The application may be the fully optimized build, but mapping events to individual lines of source code requires a build with debug information.
While the application runs, performance monitoring counters on the Intel Pentium M processor keep a running total of the specified events as they occur.
When the performance monitoring counter reaches a predetermined number, it posts an interrupt that the operating system will service.
The performance monitoring interrupt handler records the specified event and instruction pointer’s location when the interrupt occurred.
After the profiling of the application has ended, the counters can display their data.
The Pentium M brand refers to a family of mobile single-core x86 microprocessors (with the modified Intel P6 microarchitecture) introduced in March 2003 (during the heyday of the Pentium 4 desktop CPUs), and forming a part of the Intel Carmel notebook platform under the then new Centrino brand. The Pentium M processors had a maximum thermal design power (TDP) of 5–27 W depending on the model, and were intended for use in laptops (thus the "M" suffix standing for mobile). They evolved from the core of the last Pentium III–branded CPU by adding the front-side bus (FSB) interface of Pentium 4, an improved instruction decoding and issuing front end, improved branch prediction, SSE2 support, and a much larger cache. The first Pentium M–branded CPU, code-named Banias, was followed by Dothan. The Pentium M-branded processors were succeeded by the Core-branded dual-core mobile Yonah CPU with a modified microarchitecture. The Pentium M represented a new and radical departure for Intel, as it was not a low-power version of the desktop-oriented Pentium 4, but instead a heavily modified version of the Pentium III Tualatin design (itself based on the Pentium Pro core design). It is optimised for power efficiency, a vital characteristic for extending notebook computer battery life. Running with very low average power consumption and much lower heat output than desktop processors, the Pentium M runs at a lower clock speed than the laptop version of the Pentium 4 (The Pentium 4-Mobile, or P4-M), but with similar performance - a 1.6 GHz Pentium M can typically attain or even surpass the performance of a 2.4 GHz Pentium 4-M. The Pentium M 740 has been tested to perform up to approximately 7,400 MIPS and 3.9 GFLOPS (using SSE2).
The Pentium M coupled the execution core of the Pentium III with a Pentium 4 compatible bus interface, an improved instruction decoding/issuing front end, improved branch prediction, SSE2 support, and a much larger cache. The usually power-hungry secondary cache uses an access method which only switches on the portion being accessed. The main intention behind the large cache was to keep a decent-sized portion of it still available to the processor even when most of the L2 cache was switched off, but its size led to a welcome improvement in performance.
Other power saving methods include dynamically variable clock frequency and core voltage, allowing the Pentium M to throttle clock speed when the system is idle in order to conserve energy, using the SpeedStep 3 technology (which has more sleep stages than previous versions of SpeedStep). With this technology, a 1.6 GHz Pentium M can effectively throttle to clock speeds of 200 MHz, 400 MHz, 600 MHz, 800 MHz, 1000 MHz, 1200 MHz, 1400 MHz and 1600 MHz; these intermediate clock states allow the CPU to better throttle clock speed to suit conditions. The power requirements of the Pentium M varies from 5 watts when idle to 27 watts at full load. This is useful to notebook manufacturers as it allows them to include the Pentium M into smaller notebooks.
Although Intel has marketed the Pentium M exclusively as a mobile product, motherboard manufacturers such as AOpen, DFI and MSI have been shipping Pentium M compatible boards designed for enthusiast, HTPC, workstation and server applications. An adapter, the CT-479, has also been developed by ASUS to allow the use of Pentium M processors in selected ASUS motherboards designed for Socket 478 Pentium 4 processors. Shuttle Inc. offers packaged Pentium M desktops, marketed for low energy consumption and minimal cooling system noise. Pentium M processors are also of interest to embedded systems' manufacturers because the low power consumption of the Pentium M allows the design of fanless and miniaturized embedded PCs. Banias
As the M line was originally designed in Israel, the first Pentium M was identified by the codename Banias, named after an ancient site in the Golan Heights. The Intel Haifa Israel team had previously been working on the memory controller for Timna, which was based on earlier P6 memory controller designs giving them detailed knowledge of P6 architecture which they used when Intel gave them a crash project to create a backup mobile CPU. Given the product code 80535, it initially had no model number suffix, but was later identified as the Pentium M 705. It was manufactured on a 130 nm process, was released at frequencies from 900 MHz to 1.7 GHz using a 400 MT/s FSB, and had 1 megabyte (MB) of Level 2 cache. The core average TDP (Thermal Design Power) is 24.5 watts.
The CPUID signature for a Banias is 0x69X.
Dothan
Intel launched its improved Pentium M, formerly known as Dothan, named after another ancient town in Israel, on May 10, 2004. Dothan Pentium M processors (product code 80536, CPUID 0x6DX) are among the first Intel processors to be identified using a "processor number" rather than a clockspeed rating, and the mainstream versions are known as Pentium M 710 (1.4 GHz), 715 (1.5 GHz), 725 (1.6 GHz), 735 (1.7 GHz), 740 (1.73 GHz), 745 (1.8 GHz), 750 (1.86 GHz), 755 (2.0 GHz), and 765 (2.1 GHz).
These 700 series Pentium M processors retain the same basic design as the original Pentium M, but are manufactured on a 90 nm process, with twice the secondary cache. Die size, at 84 mm2, remains in the same neighborhood as the original Pentium M, even though the 700 series contains approximately 140 million transistors, most of which make up the 2 MB cache. TDP is also down to 21 watts (from 24.5 watts in Banias), though power use at lower clockspeeds has increased slightly. However, tests conducted by third party hardware review sites show that Banias and Dothan equipped notebooks have roughly equivalent battery life.[citation needed] Additionally third party hardware review sites have benchmarked the Dothan at approx 10-20% better performance than the Banias in most situations.
Revisions of the Dothan core were released in the first quarter of 2005 with the Sonoma chipsets and supported a 533 MT/s FSB and XD (Intel's name for the NX bit) (and PAE support required for it was enabled, unlike earlier Pentium Ms that had it disabled). These processors include the 730 (1.6 GHz), 740 (1.73 GHz), 750 (1.86 GHz), 760 (2.0 GHz) and 770 (2.13 GHz). These models all have a TDP of 27 W and a 2 MB L2 cache.
In July 2005, Intel released the 780 (2.26 GHz) and the low-voltage 778 (1.60 GHz).
The processor line has models running at clock speeds from 1.0 GHz to 2.26 GHz as of July 2005. The models with lower frequencies were either low voltage or ultra-low voltage CPUs designed for even better battery life and reduced heat output. The 718 (1.3 GHz), 738 (1.4 GHz), and 758 (1.5 GHz) models are low-voltage (1.116 V) with a TDP of 10 W, while the 723 (1.0 GHz), 733 (1.1 GHz), and 753 (1.2 GHz) models are ultra-low voltage (0.940 V) with a TDP of 5 W.
CONCLUSION
The Intel Pentium M processor is Intel.s first microprocessor designed specifically for the requirements of tomorrow’s mobile PCs. It provides uncompromised performance while observing the thermal and energy requirements and limitations of the mobile platform. Performance-enhancement features were included only if proved to be power-efficient. The processor features many novel power-aware performance mechanisms such as advanced branch prediction, micro-operation fusion, a dedicated stack engine, and the optimized Pentium M bus. It also features the Enhanced Intel SpeedStep technology to reduce energy consumption. These unique features enable the Pentium M processor to deliver breakthrough performance and enable extended battery life thereby providing users with a superior mobile experience.

REFERENCES

1 R. Ronen, A. Mendelson, K. Lai, S.L. Lu, F. Pollack, and J.P. Shen, .Coming Challenges in Microarchitecture and Architecture,. In Proceedings of the IEEE, Vol. 89, No. 3, March 2001, pp. 325-340.
2 IA-32 Intel Architecture Software Developer’s Manual Volume 1: Basic Architecture at ] http://developer.intel.com/design/pentium4/manuals/245 470.htm
3 D. M. Brooks et al., .Power-aware microarchitecture: design and modeling challenges for next-generation microprocessors,. IEEE Micro, Vol. 20, Issue: 6, Dec. 2000, pp. 26-44.
4 D.B. Papworth, .Tuning the Pentium® Pro microarchitecture,. IEEE Micro, Vol. 16-2, April 1996, p. 8.
5 C. Mead and L. Conway, Introduction to VLSI systems, Addison-Wesley Publishing Company,
Boston, Dec. 1980.
6 G. Hinton, D. Sager, M. Upton, D. Boggs, D. Carmean, A. Kyker, and P. Roussel, .The Microarchitecture of the Pentium 4 Processor,. Intel Technology Journal, Issue 1, 2001, article 2.

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