JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
M. TECH (REAL TIME SYSTEMS)
COURSE STRUCTURE AND SYLLABUS

I YEAR I SEMESTER
Code Group Subject L P Credits Advanced Computer Architecture 3 0 3 Advanced Micro Controllers 3 0 3 Fundamentals of Real Time Systems 3 0 3 Design & Development of Real Time Systems 3 0 3 Elective -I Digital Control Systems
Distributed Operating Systems
Cloud Computing 3 0 3 Elective -II Digital Systems Design
Fault Tolerant Systems
Advanced Computer Networks 3 0 3 Lab Micro Processors and Programming Languages Lab 0 3 2 Seminar - - 2 Total Credits (6 Theory + 1 Lab.) 22

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

MASTER OF TECHNOLOGY (REAL TIME SYSTEMS)
I SEMESTER
ADVANCED COMPUTER ARCHITECTURE

UNIT I
Concept of instruction format and instruction set of a computer, types of operands and operations; addressing modes; processor organization, register organization and stack organization; instruction cycle; basic details of Pentium processor and power PC processor, RISC and CISC instruction set.
UNIT II
Memory devices; Semiconductor and ferrite core memory, main memory, cache memory, associative memory organization; concept of virtual memory; memory organization and mapping; partitioning, demand paging, segmentation; magnetic disk organization, introduction to magnetic tape and CDROM.
UNIT III
IO Devices, Programmed IO, interrupt driver IO, DMA IO modules, IO addressing; IO channel, IO Processor, DOT matrix printer, ink jet printer, laser printer.
Advanced concepts; Horizontal and vertical instruction format, microprogramming, microinstruction sequencing and control; instruction pipeline; parallel processing; problems in parallel processing; data hazard, control hazard.
UNIT IV
ILP software approach-complier techniques-static branch protection-VLIW approach-H.W support for more ILP at compile time-H.W verses S.W solutions
Multiprocessors and thread level parallelism-symmetric shared memory architectures-distributed shared memory-Synchronization-multi threading.
UNIT V
Storage System-Types-Buses-RAID-errors and failures-bench marking a storage device designing a I/O system.
Inter connection networks and clusters-interconnection network media – practical issues in interconnecting networks-examples-clusters-designing a cluster

Text Books:
1. “Computer organization and architecture”, Williams Stallings, PHI of India, 1998.
2. Computer organization, Carl Hamachar, Zvonko Vranesic and Safwat Zaky, McGraw Hill International Edition.
3. Computer Architecture & Organization, John P. Hayes, TMH III Edition.
4. Computer Architecture A quantitative approach 3rd edition John L. Hannessy & David A. Patteson Morgan Kufmann (An Imprint of Elsevier)

Reference Books:
1. “Computer Architecture and parallel Processing” Kai Hwang and A. Briggs International edition McGraw-Hill.
2. Advanced Computer Architecture, Dezso Sima, Terence Fountain, Peter Kacsuk, Pearson. JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

MASTER OF TECHNOLOGY (REAL TIME SYSTEMS)
I SEMESTER
ADVANCED MICRO CONTROLLERS

UNIT I
INTRODUCTION TO EMBEDDED SYSTEMS
Review of Micro controllers and their Features. 8 & 16 Bit Micro Controller Families (of Intel 8051) Flash
Series, Motorola 68HC11; Micro Chip PIC 16C6X and Micro controller hardware, Embedded RISC Processor Architectures – ARM6TDMI (Advanced RISC Machines).
UNIT II
MICRO CONTROLLER INTERFACING
8051, 68HC11, PIC-16C6X and ATMEL External Memory Interfacing – Memory Management Unit, Instruction and data cache, memory controller.
On Chip Counters, Timers, Serial I/O Interrupts and their use. PWM /Watch dog, ISP, IAP features.
UNIT III
PROGRAMMING
Instruction sets and assembly language programme concepts and programming the 8051, 68HC11, PIC-
16C6X Micro Controller ARM6TDMI Core (SOC) and PIC-IDE.
UNIT IV
Interrupt synchronization – Interrupt vectors & Priority, external interrupt design. Serial I/O Devices RS232 Specifications, RS422/Apple Talk / RS423/ RS435 & other communication protocols. Serial communication controller.
Ethernet Protocol, SDMA, Channels and IDMA simulation, CPM Interrupt controller and CPM Timers.
UNIT V
Power Controls, External BUS Interface system Development and Debugging.
CASE STUDIES: Design and Embedded Systems using the Micro Controller – 8051/ARM6TDMI, for application in the area of Communications, Automotives, industrial control.

Text Books:
1. M.A.Mazadi & J.G. Mazidi, “The 8051 Micro Controller & Embedded Systems”, Pearson Education, Asia (2000).
2. John B. Peatman, Designing with PIC Micro Controllers, Pearson Education.
3. Jonathan W. Valvano, Embedded Microcomputer Systems, Real Time Interfacing. Brookes/Cole, Thomas learning 1999.
4. Cathey May and Silha
5. (Ed)., “The Power PC Architecture”, Morgan Kauffman Press (1998).

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

MASTER OF TECHNOLOGY (REAL TIME SYSTEMS)
I SEMESTER
FUNDAMENTALS OF REAL TIME SYSTEMS

UNIT I
Introduction, A Car-and-Driver Example, Issues in Real-Time Computing, Structure of a Real-Time Systems, Task Classes, Issues Covered in this Book, Characterizing Real-time Systems and Tasks, Performance Measures for Real-Time Systems, Estimating Program Run Times, Suggestions for Further Reading.
Task Assignment and Scheduling
Introduction, Classical Uniprocessor Scheduling Algorithms, Uniprocessor Scheduling of IRIS Tasks, Task Assignment, Mode Changes, Fault-Tolerant Scheduling, Suggestions for Further Reading.
UNIT II
Programming Languages and Tools
Introduction, Desired Language Characteristics, Data Typing, Control Structures, Facilitating Hierarchical Decomposition, Packages, Run-time Error (Exception) Handling, Overloading and Generics, Multitasking, Low-Level Programming, Task Scheduling, Timing Specifications, Some Experimental Languages, Programming Environments, Run-time support, Suggestion for Further reading.
UNIT III
Real-Time Databases
Introduction, Basic Definitions, Real-Time vs General-Purpose Databases, Main Memory Databases, Transaction Priorities, Transaction Aborts, Concurrency Control Issues, Disk Scheduling algorithms, A two-phase approach to improve predictability. Maintaining Serialization Consistency, Databases for Hard Real – Time systems. Suggestion for further reading.
Real time Communication
Introduction, Network Topologies, Protocols, suggestions for Further Reading
UNIT IV
Fault- Tolerance Techniques
Introduction, What Causes Failures? Fault Types, Fault Detection, Fault and Error Containment, Redundancy, Data Diversity, Reversal Checks, Malicious or Byzantine Failures, Integrated Failure handling, Suggestions for further reading.
UNIT V
Reliability Evaluation Techniques
Introduction, Obtaining Parameter Values, Reliability Models for Hardware Redundancy, Software-Error Models, Taking time into account, Suggestions for further reading
Clock Synchronization
Introduction, Clocks, A Nonfault-Tolerant Synchronization algorithm, Impact of faults, fault-tolerant synchronization in hardware, Synchronization in software, Suggestion for further reading

Text Books: Real Time Systmes, Krishna C.M & Kand Shin G. Mc Graw Hill, 1997, L.R. Rabiner & R. W. Schafe

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

MASTER OF TECHNOLOGY (REAL TIME SYSTEMS)

I SEMESTER
DESIGN & DEVELOPMENT OF REAL TIME SYSTEMS
UNIT I
Introduction to Real-Time Systems
Historical background, Elements of a computer control systems, Real-Time Systems- definition, Classification of real-time systems, Time constraints, Classification of programs, Summary.
Concepts of Computer control
Introduction, Sequence control, Loop control (direct digital control), Supervisory control, Centralized computer control, Hierarchical systems, Distributed systems, Human-Computer Interface (HCI), the control engineer, Economics and benefits of computer control systems, Summary.

UNIT II
Computer Hardware Requirements for Real-Time applications
Introduction
General purpose computer, Single-chip microcomputers and microcontrollers, Specialization Processor, Process-related Interfaces, Data Transfer techniques, Communications, Standard Interface, Summary.
DDC Algorithms and Their Implementation
Introduction, Implementation for the Basic PID algorithm, Synchronization of the control loop.

UNIT III
Bumpless transfer, Saturation and integral action wind-up, Tuning Choice of sampling interval, Plant input and output, improved forms of algorithm for integral and derivative calculation, Implementation of controller designs based on plant models, Summary
Design of Real-Time Systems – General Introduction
Introduction, Specification document, Preliminary design, Single-program Approach Foreground/Background system, Multi-tasking approach, Mutual exclusion, Monitors, Rendezvous, Summary.

UNIT IV
Real-Time System Development Methodologies – 1
Introduction, Yourdon methodology, Requirements definition for drying oven, Ward and Mellor method, Hatley and Pirbhai method, Comments and the Yourdon Methodologies summary
Real-Time System Development Methodologies -2
MASCOT, Basic features of MASCOT, General design approach, Textual representation of MASCOT designs, Other features of MASCOT, Development facilities, The MASCOT Kernel, Summary of MASCOT, Formal Methods, The PAISLey system for real-time software development method, PAISLey summary, Summary.

UNIT V
Dependability, Fault detection and fault tolerance
Introduction, USE of Redundancy, Fault tolerance in Mixed Hardware-Software systems, Fault detection measures, Fault detection mechanisms, Damage containment and assessment Provision of fault tolerance, summary

Text Books:
Real Time Computer control, Stuart Bennett, 2nd edition, Pearson Education

Reference Books
Real-Time Systems Design and Analysis by Phillip A Laplante JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

MASTER OF TECHNOLOGY (REAL TIME SYSTEMS)

I SEMESTER ELECTIVE - I
DIGITAL CONTROL SYSTEMS
UNIT I
SAMPLING AND RECONTRUCTION
Introduction, Examples of Data Control Systems – Digital to Analog conversion and Analog to Digital conversion, sample and hold operations.

UNIT II
THE Z - TRANSFORMS
Introduction, Linear difference equations, pulse response, Z-transforms, Theorems of Z-Transforms, the inverse Z – transforms, Modified Z –Transforms.
Z-PLANE ANALYSIS OF DISCRETE-TIME CONTROL SYSTEMS
Z-Transform method for solving difference equations, Pulse transforms function, block diagram analysis of sampled – data systems, mapping between s-plane and z-plane.

UNIT III
STATE SPACE ANALYSIS
State Space Representation of discrete time systems, Pulse Transfer Function Matrix solving discrete time state space equations, State transition matrix and it’s Properties, Methods for Computation of State Transition Matrix, Discretization of continuous time state-space equations

UNIT IV
CONTROLLABILITY AND OBSERVABILITY
Concepts of Controllability and Observability, Tests for controllability and Observability. Duality between Controllability and Observability, Controllability and Observability conditions for Pulse Transfer Function.
STABILITY ANALYSIS
Mapping between the S-Plane and the Z-Plane – Primary strips and Complementary Strips – Constant frequency loci, Constant damping ratio loci, Stability Analysis of closed loop systems in the Z-Plane. Jury stability test – Stability Analysis by use of the Bilinear Transformation and Routh Stability criterion.

UNIT V
DESIGN OF DISCRETE TIME CONTROL SYSTEM BY CONVENTIONAL METHODS
Transient and steady – State response Analysis – Design based on the frequency response method – Bilinear Transformation and Design procedure in the w-plane, Lead Lag and Lead-Lag compensators and digital PID controllers.
STATE FEEDBACK CONTROLLERS AND OBSERVERS
Design of state feedback controller through pole placement – Necessary and sufficient conditions, Ackerman’s formula State Observers – Full order and Reduced order observers.

Text Books
1. Discrete-time Control systems – K. Ogata, Pearson Education/PHI, 2nd Edition
2. Digital Control and State Variable Methods by M.Gopal, TMH
References:
1. Digital Control Systems, Kuo Oxford University Press 2nd Edition 2003
2. Digital Control Engineering, M.Gopal JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

MASTER OF TECHNOLOGY (REAL TIME SYSTEMS)

I SEMESTER ELECTIVE - I
DISTRIBUTED OPERATING SYSTEMS
UNIT I
Characteristics of Distributed Systems, Design Issues, User requirements, Network Technologies and Protocols, IPC, Client-server Communication, Group communications, IPC in UNIX.
Remote Procedure calling Design issue, implementation, Asynchronous RPC

UNIT II
Distributed OS, its Kernel, Processor and Threads, Naming and Protection, Communication and Invocation, Virtual memory, File service components, Design issues, Interfaces, Implementation techniques, SUN Network File System.

UNIT III
SNS – a name service model, its design issues, Synchronizing physical clocks, Logical time and logical clocks, Distributed coordination, Replication and its architectural model, Consistency and request ordering, Conversation between a client and a server, Transactions, Nested Transactions
Concurrency control, Locks, Optimistic concurrency control, Timestamp ordering, Comparison of methods for concurrency control.

UNIT IV
Distributed Transactions and Nested Transactions Atomic commit protocols, Concurrency control in distributed transactions, distributed Deadlocks, Transactions with replicated data, Transaction recovery, Fault Tolerance, Hierarchical and group masking of faults

UNIT V
Cryptography, Authentication and Key distribution, Logics and Authentication, Digital Signatures.
Distributed shared memory, Design and Implementation issues, sequential consistency and ivy, Release consistency and Munin, Overview of Distributed Operating systems Mach, Chorus.

Text Books:
1. Distributed Systems Concepts and Design, g. Coulouris, J. Dollimore and T Kindberg, Second Edition, Addison Wesley.

References:
1. Advanced Concepts in Operating Systems, M. Sighal, N.G Shivarathri, Tata McGraw-Hill Edition. JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

MASTER OF TECHNOLOGY (REAL TIME SYSTEMS)

I SEMESTER ELECTIVE - I

CLOUD COMPUTING
UNIT – I
Introduction to virtualization and virtual machine, Virtualization in cluster/grid context
Virtual network, Information model & data model for virtual machine, Software as a Service (SaaS), SOA, On Demand Computing.

UNIT – II Cloud computing: Introduction, What it is and What it isn’t, from Collaborations to Cloud, Cloud application architectures, Value of cloud computing, Cloud Infrastructure models, Scaling a Cloud Infrastructure, Capacity Planning, Cloud Scale.

UNIT – III
Data Center to Cloud: Move into the Cloud, Know Your Software Licenses, The Shift to a Cloud Cost Model, Service Levels for Cloud Applications
Security: Disaster Recovery, Web Application Design, Machine Image Design, Privacy Design,
Database Management, Data Security, Network Security, Host Security, Compromise Response UNIT – IV
Defining Clouds for the Enterprise- Storage-as-a-Service, Database-as-a-Service, Information-as-a-Service, Process-as-a-Service, Application-as-a-Service, Platform-as-a-Service, Integration-as-a-Service, Security-as-a-Service, Management/Governance-as-a-Service, Testing-as-a-Service, Infrastructure-as-a-Service

UNIT – V
Disaster Recovery, Disaster Recovery, Planning, Cloud Disaster Management
Case study: Types of Clouds, Cloudcentres in detail, Comparing approaches, Xen OpenNEbula , Eucalyptus, Amazon, Nimbus

Text Books:
1. Cloud Computing – Web Based Applications That Change the way you Work and Collaborate Online – Michael Miller, Pearson Education.
2. Cloud Application Architectures, 1st Edition by George Reese O'Reilly Media.

Reference Book:
1. Cloud Computing and SOA Convergence in Your Enterprise: A Step-by-Step Guide
David S. Linthicum Addison-Wesley Professional. 2. Enterprise Web 2.0 Fundamentals by Krishna Sankar; Susan A. Bouchard, Cisco Press JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

MASTER OF TECHNOLOGY (REAL TIME SYSTEMS)

I SEMESTER ELECTIVE - II
DIGITAL SYSTEMS DESIGN
UNIT I
DESIGN OF DIGITAL SYSTEMS: ASM charts, Hardware description language and control sequence method, Reduction of state tables, state assignments.
SEQUENTIAL CIRCUIT DESIGN: design of Iterative circuits, design of sequential circuits using ROMs and PLAs, sequential circuit design using CPLD, FPGAs.

UNIT II
FAULT MODELING: Fault classes and models – Stuck at faults, bridging faults, transition and intermittent faults.
TEST GENERATION: Fault diagnosis of Combinational circuits by conventional methods – Path Sensitization techniques, Booleam difference method, Kohavi algorithm.

UNIT III
TEST PATTERN GENERATION: D-Algorithm, PODEM, Random testing, Transition count testing, Signature analysis and testing for bridging faults.
FAULT DIAGNOSIS IN SEQUNTIAL CIRCUITS: State identification and fault detection experiment, Machine identification, Design of fault detection experiment.

UNIT IV
PROGRAMING LOGIC ARRAYS: Design using PLA’s, PLA minimization and PLA folding.
PLA TESTING: Fault models, Test generation and Testable PLA design.

UNIT V
ASYNCHRONOUS SEQUENTIAL MACHINE: Fundamental mode model, flow table, state reduction, minimal closed covers, races, cycles and hazards.

Text Books
1. Z. Kohavi – “Switching & finite Automata Theory” (TMH)
2. N.N. Biswas – “Logic Design Theory (PHI)
3. Nolman Balabanian, Bradly Calson Logic Design Principles” – Wily student Edition 2004.

References:
1. M. Abramovici, M.A. Breues, A.D. Friedman – “Digital System Testing and Testable Design”, Jaico Publications.
2. Charles H. Roth Jr. – “Fundamentals of Logic Design”. Frederick J.Hill & Peterson –“Computer Aided Logic Design” – Wiley 4th Edition JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
MASTER OF TECHNOLOGY (REAL TIME SYSTEMS)

I SEMESTER ELECTIVE - II
FAULT TOLERANT SYSTEMS
UNIT I
Basic Concepts
Failure and Faults, reliability and failure rate, relation between eligibility and Mean-time between failures, maintainability and availability, reliability and series and parallel systems, Modeling of faults, stuc at, Bridging (short circuit), stuck open, transient and intermittent faults.
Fault diagnosis of digital systems, Test generation for combinational logic circuits conventional methods, Random testing, transition count testing and signature analysis

UNIT II
Basic concepts – static, dynamic, Hybrid, and self-purging redundancy, shift – over Modular Redundancy (SMR). Tripte Modular redundancy, SMR.
Reconfiguration, use of error correcting codes, Time redundancy, software redundancy, fail soft-operation examples of practical fault tolerant systems, Introduction to fault Tolerant Design of VLSI chips.

UNIT III
Design of Totally self-checking checkers, checkers using m-out of n codes, Berger codes and low cost residue code. Self-checking sequential Machines, Partially self checking circuits.

UNIT IV
Basic Concepts of test ability, controllability and observability. The read muller expansion technique, three level OR-AND-OR design, use of control logic and syndrome-testable design.

UNIT V
Design of Testable Sequential circuits the scan-path technique – leel sensitive scan design (LSSD) and Random Access scan technique, built-in-test, built-in-test of VLSI chips, design for autonomous self-test, Designing Testability into logic Boards. .

Text Books
1. Fault Tolerant and Fault testable hardware design, Parag K.Lala PHI 1985

References Books:
1. Digital systems design using PLD’s LALA, PHI 1990
2. Logic Design theory, N.N. Biswas, PHI 1990 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
MASTER OF TECHNOLOGY (REAL TIME SYSTEMS)
I SEMESTER ELECTIVE - II

ADVANCED COMPUTER NETWORKS
UNIT I Review
Computer Networks and the Internet: What is the Internet, The Network edge, The Network core, Access Networks and Physical media, ISPs and Internet Backbones, Delay and Loss in Packet-Switched Networks, History of Computer Networking and the Internet - Foundation of Networking Protocols: 5-layer TCP/IP Model, 7-Layer OSI Model, Internet Protocols and Addressing, Equal-Sized Packets Model: ATM - Networking Devices: Multiplexers, Modems and Internet Access Devices, Switching and Routing Devices, Router Structure.

UNIT II
The Link Layer and Local Area Networks: Link Layer: Introduction and Services, Error-Detection and Error-Correction techniques, Multiple Access Protocols, Link Layer Addressing, Ethernet, Interconnections: Hubs and Switches, PPP: The Point-to-Point Protocol, Link Virtualization - Routing and Internetworking: Network–Layer Routing, Least-Cost-Path algorithms, Non-Least-Cost-Path algorithms, Intradomain Routing Protocols, Interdomain Routing Protocols, Congestion Control at Network Layer

UNIT III
Logical Addressing: IPv4 Addresses, IPv6 Addresses - Internet Protocol: Internetworking, IPv4, IPv6, Transition from IPv4 to IPv6 – Multicasting Techniques and Protocols: Basic Definitions and Techniques, Intradomain Multicast Protocols, Interdomain Multicast Protocols, Node-Level Multicast algorithms - Transport and End-to-End Protocols: Transport Layer, Transmission Control Protocol (TCP), User Datagram Protocol (UDP), Mobile Transport Protocols, TCP Congestion Control – Application Layer: Principles of Network Applications, The Web and HTTP, File Transfer: FTP, Electronic Mail in the Internet, Domain Name System (DNS), P2P File Sharing, Socket Programming with TCP and UDP, Building a Simple Web Server

UNIT IV
Wireless Networks and Mobile IP: Infrastructure of Wireless Networks, Wireless LAN Technologies, IEEE 802.11 Wireless Standard, Cellular Networks, Mobile IP, Wireless Mesh Networks (WMNs) - Optical Networks and WDM Systems: Overview of Optical Networks, Basic Optical Networking Devices, Large-Scale Optical Switches, Optical Routers, Wavelength Allocation in Networks, Case Study: An All-Optical Switch

UNIT V
VPNs, Tunneling and Overlay Networks: Virtual Private Networks (VPNs), Multiprotocol Label Switching (MPLS), Overlay Networks – VoIP and Multimedia Networking: Overview of IP Telephony, VoIP Signaling Protocols, Real-Time Media Transport Protocols, Distributed Multimedia Networking, Stream Control Transmission Protocol - Mobile A-Hoc Networks: Overview of Wireless Ad-Hoc Networks, Routing in Ad-Hoc Networks, Routing Protocols for Ad-Hoc Networks – Wireless Sensor Networks: Sensor Networks and Protocol Structures, Communication Energy Model, Clustering Protocols, Routing Protocols

TEXT BOOKS:
1. Computer Networking: A Top-Down Approach Featuring the Internet, James F. Kurose, Keith W.Ross, Third Edition, Pearson Education, 2007
2. Computer and Communication Networks, Nader F. Mir, Pearson Education, 2007
REFERENCES:
1. Data Communications and Networking, Behrouz A. Forouzan, Fourth Edition, Tata McGraw Hill, 2007
2. Guide to Networking Essentials, Greg Tomsho,Ed Tittel, David Johnson,Fifth Edition, Thomson.
3. An Engineering Approach to Computer Networking , S.Keshav, Pearson Education.
4. Campus Network Design Fundamentals, Diane Teare, Catherine Paquet, Pearson Education (CISCO Press)
5. Computer Networks, Andrew S. Tanenbaum, Fourth Edition, Prentice Hall.
6. The Internet and Its Protocols,A.Farrel,Elsevier. JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
MASTER OF TECHNOLOGY (REAL TIME SYSTEMS)

I SEMESTER
MICROPROCESSORS AND PROGRAMMING LANGUAGE LAB

1. 8259 – Interrupt Controller
2. 8279 – Keyboard display
3. 8255 – PPI
4. 8251 – USART
5. Reading and Writing on a parallel port
6. Timer in different modes
7. Serial communication implementation
8. Exercise on C++, prolog, lisp and similar languages