General Objective:

To know and understand the addressing mode and programming.

Specific Objectives:

At the end of the unit you should be able to:
4.1 classify and describe the addressing modes
4.2 explain the concept of programming
4.3 discuss the implementation structure of programming

0. INTRODUCTION

Programming is a process of composing several instructions to perform certain tasks. The product of the programming is called a program which contains several instructions. The skill of programming is to know the best or optimum composition of selective instructions to performs the required tasks. In other words, we may classify these skills into uniform concepts as structure of programming implementation. These structure shall bear the emphasis to: • what instructions (selectable from a complete list of instructions as a tools list) essential and best to perform a certain task; • how these instructions are organized into a sub program which can be reused or recalled as many times as possible to perform the identical task with different set of data; • to preserve the minimum lines of instruction but performs the maximum tasks. The less instruction lines require less operating times, thus expetite the implementation speed.

The main proccess of program (instructions) implementation is nothing else just the manipulation of data. We need to know how to identify the source of data, procedure to fetch these data, to process these data, procedure to send these data to the required and allowable destinations. The procedure of fectching and sending data between source and destinations is carried out by various addressing approaches which are known as addressing modes. The structure of the internal registers of MC68000 is shown in Figure 4.1. The whole or portion of this structure will be used to show the data changes and movement throughout the rest of this unit.

In this unit, we will learn the addressing modes, programming, and the structure of program implementation.
4.1 Addressing modes □ The MC68000 has 14 different addressing modes which are subdivided into six groups, based on how they generate an effective address (EA). □ The addressing modes in all groups; except immediate data addressing group produce an effective address. □ The objectives of these addressing modes is to supply different ways for the programmer to generate an effective address (EA) that identIfies the location of an operand. □ The operands may be specified as part of the intruction in program memory. □ In general, operands referenced by an effective address reside either in one of the MC68000's internal registers or in the external data memory. □ For a memory operand, the address is calculated in the 32-bit 2’s complement form. However only the lower 24-bits of the result are actually used for the operand address. □ It is important to point out that in accessing a memory operand as a word or longword, its effective address must be evaluated to an even address; otherwise, error will occur when that instruction is executed. □ The Table 4.1 lists all the addressing modes together with the effective address generation.

1. Register Direct addressing □ Register direct addressing modes are used when one of the data or address registers within the 68000 contains the operand that is to be processed by the instruction. □ If the specified register is a data register, the addressing mode is called data register direct addressing. □ On the other hand, If the specified register is a address register, the addressing mode is called address register direct addressing. □ Register direct addressing is the fastest and most compact addressing mode because no memory reference operation is required for accessing the operand.

(a) Data Register Direct Addressing □ The operand address is the data register specified in the instruction. □ The content of that data register is treated as the operand required for the operation. □ The sample instruction is:

Figure 4.2 Data Register Direct Addressing instruction

(b) Address Register Direct Addressing □ The operand address is an address register specified in the instruction.

Figure 4.3 Address Register Direct Addressing instruction 2. Absolute data addressing □ The effective address (EA) is included in the instruction. □ This addressing mode is used to access operands that reside in memory. □ Two modes: absolute short data addressing and absolute long data addressing.

(a) Absolute short data Addressing □ A 16-bit (HHHH) absolute address must be included as the second word of the instruction to specify the location of an operand. □ This word is the EA of the storage location for the operand in memory. □ The EA is specified by the 16-bit (HHHH) displacement in the extension word. □ Assembler syntax: XXXX ( 0 ≤ XXXX ≤ FFFF) EA calculation : EA = XXXX (sign extended) (0 ≤ EA ≤ 007FFF ; if 0 ≤ 7FFF) (FF8000 ≤ EA ≤ FFFFFF ; if 8000 ≤ FFFF)

□ The 68000 automatically does a sign-extension based on the MSB of the absolute short address to give a 32-bit address (actually only 24-bits (HHHHHH) are used). □ Since only 16-bits displacement can be used, therefore, the addressable memory range is : First 32K: 000000 – 007FFF and Last 32K : FF8000 – FFFFFF.

□ Example: MOVE.L 1234,D0 ($001234 to $001237) ( D0. □ This instruction stands for move the long word (4 bytes) starting at address $1234 (4 address locations) in memory into data register D0. □ Notice that the instruction is written with $1234 in the location for the source operand. This is the absolute address of the source operand and it is encoded by the assembler into the instruction. □ Notice that the address of the source operand is the next word after the instruction opcode in program memory.

Figure 4.4 Instruction using absolute data addressing

(b) Absolute long data Addressing □ Permits use of 32-bit quantity as the absolute address data. □ This type of operand is specified in the same way except that its absolute address is written with more than four hexadecimal digits. □ Example: MOVE.L $01234,D0. □ This instruction has the same effect as the previous instruction, but the address of the source operand is encoded by the assembler as an absolutenlong data address. □ That is, the quantity $01234 is encoded as a 32-bit number instead of a 16-bit number. This mean that the instruction now takes up three words of memory instead of two. □ Since all 24 bits are used, the operand specified with absolute long addressing can reside anywhere in the address space of the 68000. 000000 ( FFFFFF

3. Program Counter Relative addressing □ It is possible to specify the location of an operand relative to the address of the instruction that is currently being processed. Program counter relative addressing is provided for this purpose. □ The EA of the operand to be accessed is calculated relative to the updated value held in program counter (PC). □ Two types of addressing modes: Program counter relative with offset and Program counter relative with index and offset.

(a) Program Counter Relative with offset addressing ▪ 16- bit quantity identifies the number of bytes the data to be accessed are offset from the updated value in PC. ▪ The offset, who is also known as the displacement, immediately follows the instruction word in memory. ▪ When the instruction is fetched and executed, the 68000 sign-extends the offset to 32 bits and then adds it to the updated contents of the program counter. EA = PC + d16 ▪ The sum that results is the effective address of the operand in memory. ▪ Example of instruction: MOVE.L TAG,D0 ▪ This means “move the long word starting at the memory location with TAG as its label into D0”. ▪ Where is the label TAG in memory? Assembler will compute the number of bytes the displacement word in the move instruction is offset from the memory location corresponding to the label TAG. ▪ Since the 16-bit quantity specifies the offset in bytes, the operand must reside within + or – 32K (+32767 to -32768) bytes with respect to the updated value in PC. ▪ Example of instruction: MOVE.W $1200(PC),D3 Assume that the instruction starts at 122000

Figure 4.5 PC Relative with offset addressing instruction

(b) Program Counter Relative with index and offset addressing ▪ Employ both an index and an offset. ▪ Content of index register and an 8-bit displacement (offset) are combined with the updated PC to obtain the operand’s memory address, i.e the effective address (EA). ▪ The EA is given by: EA = PC + Xn + d8

▪ The index register, which is identified by Xn, can be any of the 68000’s data or address registers. The signed 8-bit displacement is specified by d8. ▪ Example of instruction: MOVE.L TABLE (A0.L),D0

▪ Here the source operand is written such that TABLE represents the displacement and A0 is the index register. ▪ This instruction copy the long word starting at the memory location in TABLE indexed by A0 into D0. ▪ In this case, the assembler computes the offset between the updated value in PC and the address of label TABLE. ▪ The value of the displacement is encoded as the least significant byte in the second word of the instruction.

Figure 4.6 Accessing elements of a table with program counter relative with index and offset addressing.

▪ Example of instruction: MOVE.L -20(PC,A2.L),D1

Figure 4.7 PC Relative with index and offset addressing instruction

4A-1: • A process of composing several instructions to performs certain tasks is called ____(a)_______. • The product of the programming is called a _____(b)______. • _____(c)____ is a uniform concepts to develop he best or optimum composition of selective instructions to performs the required tasks.

4A-2:
What is the purpose of addressing mode?

4A-3:
The MC68000 has __(a)__different addressing modes which are subdivided into __(b)__ groups.

4A-4:
State 3 of the addressing mode for MC68000.

4A-5:
In Register direct addressing modes, the operand is the content of _________________________.

4A-6:
Given the initial content of register as follows, show the calculation and data change in the affected registers, if the instruction “ADD.B D2,D4” is executed.

4A-7:

4A-8:

4A-1:
(a) Programming.
(b) program
(c) The structure of programming implementation

4A-2:
What is the purpose of addressing mode? to supply different ways for the programmer to generate an effective address (EA) that identIfies the location of an operand.

4A-3: a) 14 b) 6

4A-4:
State 3 of the addressing mode for MC68000. Refer Table 4.1
4A-5:
one of the data or address registers.

4A-6:
Given the initial content of register as follows, show the calculation and data change in the affected registers, if the instruction “ADD.B D2,D4” is executed.

4A-7:

4A-8:

`

4. Register indirect addressing • Register indirect addressing is normally called address register indirect addressing, because is the address register which is indirectly referred. • In the address register direct mode, the content of the specified address register is the operand required for the operation. • In the address register indirect mode, the specified address register contains the memory address of an operand. • There are several related modes to this addressing: a) Address register indirect b) Postincrement Address register indirect c) Predecrement Address register indirect d) Address register indirect with offset e) Address register indirect with index and offset

a) Address register indirect • The specified address register contains the memory address of an operand. • Example of instruction: (Refer Figure 4.8) CLR.L (A3)

• This instruction [CLR.L (A3)] clears the longword beginning at memory location 001234, which is the address stored in address register A3. • Eventhough address register stores 32 bits (HHHHHHHH), only 24 bits (HHHHHH) is accountable. • With the address register indirect mode, the same instruction can be repeated to operate on several different operands by changing the content of the address register each time.

Figure 4.8 Address register indirect addressing mode
(Source: Yu-Cheng Liu, Fig 2-12, pg 27)

Example:

b) Postincrement Address register indirect • Similar to the address register indirect addressing, the content of the specified address register is used as the memory address of an operand. • However, after the operation, the content of the address is incremented by 1, 2, or 4, depending on whether it is a byte, word, or longword operation. • Therefore, after the instruction execution, the same address register points to the next operand in sequence. • Example of instruction: (Refer Figure 4.9) CLR.B (A3)+

Figure 4.9 Postincrement address register indirect
(Source: Yu-Cheng Liu, Fig 2-13, pg 28)

c) Predecrement Address register indirect • Similar to the address register indirect addressing, the content of the specified address register is used as the memory address of an operand. • However, the selected address register is first decremented by 1, 2, or 4, depending on whether it is a byte, word, or longword operation. • Then, its content is used as a memory operand address. • If the address register used is A7, it will be decremented by 2 instead of 1 for byte operation. • Example of instruction: (Refer Figure 4.10) CLR.B -(A3)

Figure 4.10 Predecrement address register indirect
(Source: Yu-Cheng Liu, Fig 2-14, pg 29)

• Assume the address register A3 initially has 00003458. • Register A3 is first decremented by 1, and the resulting address is then used as the memory location to clear the data byte. • This addressing mode is typically used to process a linear array, starting from its last element toward its first element, and to push data onto a stack.

d) Address register indirect with offset • The EA is the sum of the content of the selected address register and a sign-extended displacement (offset). • An extension word is required to specify the 16-bit displacement. • Example of instruction: (Refer Figure 4.11) MOVE.B 18(A5),D3

Operation: < M ([A5] + 18) (.B) ( D3 >

Figure 4.11 Address register indirect with offset
(Source: Yu-Cheng Liu, Fig 2-15, pg 30)

e) Address register indirect with index and offset • The EA is the sum of the content of the selected address register, an index, and a displacement (offset). • The index whose size is word or longword can be taken from either a data or an address register. • The displacement is always a byte and a sign-extended to 32 bits before the addition. • An extension word, whose format is given in Figure 4.12, is required to specify the index register and displacement. • The D/A bit indicates whether the index register is a data redister (0) or an address register (1). • The index register number is designated by bits 14-12, and the index size is specified by the W/L bit, 0 for 16 bits and 1 for 32 bits.

Figure 4.12 Extension word format for the address register indirect with index addressing mode. (Source: Yu-Cheng Liu, Fig 2-16, pg 31)

• Example of instruction: (Refer Figure 4.1.4.6) MOVE.W -2(A3,D5.W),$3600(A6)

Operation: < M ([A3] + [D5.W]+ (-2) ) (.W) ( M ([A6] + $3600) >

Figure 4.13 Address register indirect with index and offset
(Source: Yu-Cheng Liu, Fig 2-17, pg 32) 5. Immediate data addressing • The operand itself is stored in the extension word as part of the instruction. In general, the data are encoded and stored in the word locations that follow the instruction in program memory. • If the immediate operand is a longword, two extension words are required. • The immediate addressing mode provides a convenient way for referencing constants that are occasionally used in a program. • Obviously, immediate operands may serve only as source operands. • Example: SO DO MOVE.L #$54321,$30000

• This instruction moves the hexadecimal constant 00054321 to four memory locations starting at hexadecimal 30000.

Figure 4.14 Operation of “ MOVE.L #$54321,$30000 “

• Notice that # symbol written before the operand indicates that immediate data addressing is employed. • If the instruction processes bytes of data, a special form of immediate addressing can be used, i.e. quick immediate addressing. • In this mode, the data are encoded directly into the instruction's operation word. • For this reason, using quick immediate addressing takes up less memory and executes faster. • Example:

(1) MOVEQ #$C5,D0 encoded to: $70C5

(2) MOVE.W #$1234,D0 encoded to $303C 1234

• The first instruction, move quick (MOVEQ), illustrates quick immediate addressing. • The immediate source operand is C516, it gets encoded as $70C5, where the least-significant byte of the instruction word is the immediate operand. • Executing this instruction load D0 with the sign-extended long-word value of $C5; that is: MOVEQ #$C5,D0 >> $FFFFFFC5 ( D0. • Looking at the second instruction, its immediate source operand gets encoded into the second word of the instruction. • When the instruction is executed, sign-extension is not performed; instead, the value $134 is loaded into the least-significant 16 bits of D0 (the most significant 16 bits of D0 are not affected), that is: MOVE.W #$1234,D0 >> $1234 ( D0 = XXXX1234.

6. Implied addressing □ Some of the 68000's instructions do not make direct reference to operands. □ Instead, inherent to their execution is an automatic reference to one or more of its internal registers. □ Typically, these registers are the stack pointers (SP), the program counter (PC), or the status register (SR). □ From Table 4.1, this mode produces EA = SR, USP, SP, PC □ An example is the instruction: BSR SUBRTN >> [ PC( -(SP) ; SUBRTN ( PC ]

□ It stands for branch to the subroutine at label SUBRTN. Both the contents of the program counter and active stack pointer always referenced during the extension of this instruction.

Several examples of invalid addressing modes have been given in the preceeding discussion. The following show some examples of incorrect instructions due to errors in operand addressing.

4B-1:
The content of the specified address register is :
_____________ (In the address register direct mode)
_____________ (In the address register indirect mode)

4B-2:
List out the five address register addressing modes.

4B-3:
Fill in the type of addressing mode for the sample instructions given:

4B-4:
Given the initial data of address registers, with reference to the operation related to A3, please work out the operation with related to A5:

4B-1:
The content of the specified address register is : the operand (In the address register direct mode) the memory address of the operand (In the address register indirect mode)

4B-2:
List out the five address register addressing modes. 1. Address register indirect 2. Postincrement Address register indirect 3. Predecrement Address register indirect 4. Address register indirect with offset 5. Address register indirect with index and offset
4B-3:
Fill in the type of addressing mode for the sample instructions given:

4B-4: Given the initial data of address registers, with reference to the operation related to A3, please work out the operation with related to A5:

4.2 Concept of programming A program is a means to perform tasks or solve problems. Thus in the process of program building consists several essential steps: □ Definition of problem. □ Logical design. □ Programming. □ Test run the program. □ Documentation of the program.

4.2.1 Definition of problem We take an example of problem to be solved by a program. Input data of two numbers. These two numbers are added, and the product is stored in a memory location.

4.2.2 Logical design Before we can write a program, it is better we derive the problem statements into a diagram of process and relationship, which is normal by means of flow chart.

Before we derive the above problem statements, we learn about the elements usually used to built a flow chart, as shown in Figure 4.15. It is not necessary a flow chart contains all of those elements, some elements are optional depends on the process and relationship of a program, just like the tools in a toolbox, which you may use some of them only to perform a task.

Now we can build a flow chart to represent the process of the problem to be solved, as shown in Figure 4.16. Subsequently we can derive the flow chart of process into programming instructions. To do this we need to know the software model of the microprocessor i.e. the what registers and memory accessible by programmer via instructions. The flowchart of instructions is shown in Figure 4.17. Some programmer may construct a program directly referenced to the flow chart of process without the flow chart of instructions.

Figure 4.15 Elements of a flow chart

Problem: Input data of two numbers. These two numbers are added, and the product is stored in a memory location.

4.2.3 Programming Based on the flow chart we can now write out a program, as shown in Figure 4.18.

Figure 4.18 Basic instruction program

4.2.4 Documentation of program The program instructions in Figure 4.18 is essential for assembler to run the program practically. However, for those who analyze the instructions will find convenience if comments is stated side by side the instructions, especially the key instructions. Figure 4.19 is the improved program of Figure 4.18. The comment field clearly explains the process of the instructions.

Figure 4.19 Program with documetation

4.2.5 Analysis of instruction A program consists many instructions and each instruction is executed with referenced to the present contents of the internal registers and memory locations. In other words, the present data in the registers and memory locations will be used to execute an instruction. The execution may then alter the contents of the internal registers and memory location. Thus it is very important to know the data of "Before" and "After" in the registers and memory locations. The output of an instruction is then used as the input of the next instruction

The same registers and memory locations will be shared for all the intructions throughout the program.

It seems that all instructions are closely related. However, each instruction can be analyzed individually, provided the present data of the registers and memory locations are known specifically. Figure 4.20 shows each of the instruction of the program is analyzed individually.

Figure 4.20 Each instruction of the program is analyzed individually.

4.2.6 Load the program We have known what instructions to compose a program. But how to load this program? A development system is an instrument that is used to develop programs and hardware for a microprocessor-based system. This system provide capabilities such as: □ To develop programs in either assembly language or a variety of high-level languages □ Powerful tools for efficient debugging of programs □ Facilities for connection to external hardware for debugging of circuit operation □ To integrate the user's software and hardware together for testing and debugging.

The above system is a powerful development system and is normally used for major microprocessor development projects. For the purposes of education, the MC68000 educational microcomputer is a simplified development system that is intended to be used by students and designers to learn how to develop hardware and assembly language programs for 68000-based microcomputers. This educational system board provides only limited development support. However, it includes all the hardware of a complete microcomputer: □ 32K bytes of RAM for data and user program storage; □ 16K bytes of PROM for storage of the monitor program; □ interfaces for a variety of input/output (I/O) devices, such as CRT terminal, a printer, and a cassette player/recorder. □ Prototyping area that allows the user to build custom interfaces easily into the microcomputer.

To let the user or programmer to access this system, a software is provided. TUTOR is the software interface through which the user can talk to the MC68000 educational microcomputer. It is a simple monitor program stored in PROM that provides a set of commands for use in the entry, execution, and debugging of assembly language programs. The Tutor monitor program is accessed via the monitor commands as listed in Figure 4.24.

Syntax of a Monitor Command When commands are keyed in from the keyboard of the terminal, they must always be entered using a special form that is understood by the monitor program. This is known as the command's syntax, and if it is not correctly followed, the command entry will result in the display of a syntax error message. The general format for a command entry is

Please notice that the syntax of monitor command is not the instruction set of the assembly language although it may look idebtical in structure. There are four fields within the format: the negative form (NO) field, the command field, the parameters field, and the options field. When entered, each of these fields must be seperated by a space. In general format, any field that is enclosed within square brackets is optional. Therefore, the minimum command entry response to the tutor prompt is just:

A field enclosed with an angle bracket is to be replaced by a syntactical variable. For instance, the command field can be replaced with a mnemonic from the list in Table 4.5. Example:

Table 4.5 The monitor commands of Tutor monitor program (Source: Walter, Fig 5.4, pg 121)

The command is to be keyed in at the prompt:

Although there are many commands, we just take a few of them to show the concept of using them. For a desperate learner like you, it is better we start with a command to load a program. We may load the program that we built previously as shown in Figure 4.19. However for a better presentation, we take another example of program with branching instructions to show the address changes. Say the program's instructions are as shown in Figure 4.21.

Figure 4.21 The example of program to be loaded (Source: Walter, Fig 5-16, pg 145)

First, let us assume that the program is to be entered into memory starting at address 003000H. To do this, the "Memory Modify" (MM) command with the DI option specified is first used to bring up the assembler. This is done by issuing the command:

Tutor responds with:

Here we have assumed the memory location $003000 originally contains data 1005H, which when disassembled is the instruction of MOVE.B D5,D0 The ? displayed at the end of the disassembled instruction is a prompt for us to enter the new instruction. Now we enter the first instruction of the program preceded by a space. The display appears:

Load LEA $1000,A1:

The display shows:

Please note that the content of memory locations started at address $003000 has changed from 1005 to 43F81000. The data "43F81000" actually represents instruction "LEA $1000,A1". This data size is 4 bytes ($43-$F8-$10-$00), thus takes up four memory locations from $003000 to $003003, and the next instruction will be started at address $003004. It ia assumed the existing data of $003004 is "DC.W $FFFF"

The above procedure is to be repeated for all other instructions, and the final display after all the instructions had been entered, will be as shown in Figure 4.22.

Figure 4.22 The display of Tutor monitor after the program instructions are loaded

Since the program is entered using a line-by-line assembler, symbols and labels cannot be used. For instance, the label NXTPT in the BNE instruction is replaced by the starting address of the instruction MOVE.W (A1)+,(A2)+, which is $300E. When a forward label reference is encountered, the corresponding addresses may not be available as yet. In this case, the label can be entered as an '*' as a first step. When the rest of the program has been entered, the addresses will be known and the instructions that contain asterisks can be reentered with the correct values of addresses. (Refer Figure 4.23)

Figure 4.23 The display of Tutor monitor after the program instructions are loaded (Source: Walter, Fig 5.17, pg 146)

4.2.6 Test run the program During the early stages of program development, an operation known as single-stepping the program is very useful. By single-stepping, we mean that one instruction of the program is executed at a time. The state of the microprocessor's internal registers and data in memory that are affected by the instruction can be examined just before and after it is executed. In this way, the operation of the program can be verified instruction by instruction. The Trace commands are the commands provided in Tutor for single-stepping through a program. Tutor has two trace commands called trace (TR or T) and trace to temporary breakpoint (TT). We will begin with TR command. This command can be used to execute either one or several instructions. To execute one instruction, the command is issued as either:

or just

In response to this command, the microcomputer executes the instruction pointed to by the current value in PC and then it displays the contents of the 68000's internal registers. In Figure 4.24, we have initialized PC to the address $003000 and then executed the instruction: LEA.L $1000,A1

From this figure, you can see the change in registers. The first command DF (display formatted registers) will list out the content of all registers. This command has not executed the first instruction yet. At the end of registers list, shown the next instruction to be executed, i.e. the first instruction of the program, stored at address 003000, which is pointed by the PC.

Now it is ready to start the trace process by the command TR. After the first instruction "LEA.L $1000,A1" is executed, the contents of registers are shown. Content of A1 is changed from 00000000 to 00001000. PC is pointing to the address (003004) of next instruction i.e. " LEA.L $2000,A2". This instruction is stated at the end of the registers list.

Figure 4.24 Executing an instruction with the trace command. (Source: Walter, Fig 5-20, pg 150)

Debugging a program:

When a program is correctly entered into the assembly program, the program will be executed properly without any error syntax. However, in practice it is common to have errors in programs, and even a single error can render the program useless. Errors in a program are also referred to as bugs. The process of removing them is called debugging. The two types of errors that can be made by a programmer are syntax errors and execution errors.

A syntax error is an error caused by not following the rules for coding or entering an instruction. These types of errors are typically identified by the microcomputer's assembler or monitor and signed to the user with error messages. For this reasons, they are usually easy to find and correct.

An execution error is an error in the logic behind the development of the program. That is, the program is correctly coded and entered, but it does not perform the operation for which it was planned. This type of error can be identified by entering the program into the microcomputer and executing it. The TUTOR monitor program has ability to debug execution errors in a program is aided by the commands of the TUTOR monitor. For instance, the TR command allows us to step through the program by executing just one instruction at a time. In this way, we can use the register and memory display commands to determine the state of the microcomputer priorto execution of an instruction again and again just after its execution. This information will tell us whether the instruction has performed the operation planned for it. If an error is found, the cause can be determined and corrected.

In the above sections, we have analyzed some of the TUTOR monitor commands for the basic needs, as summarized here:

DF: Display formatted registers -- see the contents of registers. MM: Modify memory -- to set the starting address, then key in instructions lines. .PC: Display/Set Program Counter -- determine which is the starting instructon. TR: Trace or single step -- execute instruction line by line.

The two major data storages are internal registers and memory locations. DF is used to display the content of internal registers, whereas MD (Memory Display) can be used to display the content of memory (MD is not discussed in details in above section).

4.3 Implementation Structure of programming

In Unit 3, we have known so many instructions of assembly language are provided to be used to compose a program, In the above sections of Unit 4, we have learned the addressing modes. All these elements are just the tools to be utilised. The effective programming is the know how to identify the best or optimum tools, i.e. the composition of instructions and selection of addressing modes to produce a program with the features of least instruction lines; least executions durations; easy alterations and modifications. We may identify several optimum and mostly used composition of instructions as the implementation structure of programming.

1. Construct of Sequential

Sequential structure is the basic, simple and straight forward approach of programming construct. The instructions are executed one after another from the beginning until the end of the program. Figure 4.25 shows the flow chart of the sequential construct.

Figure 4.25 Flow chart of sequence construct

2. Construct of Loop

In normal application, we may need the same process to be repeated in automatic mode, thus the program execution is repeated. This programming structure is called loop construct.

Figure 4.26 (a) shows the flow chart of the loop construct. In the programming aspect, at the end of the program, we just assert an instruction to instruct the program execution to go back to the first instruction of the program. Figure 4.26 (b) shows a program construct using a Jump instruction to loop back to the beginning of the program.

However this basic loop construct has no end, meaning the program execution will proceed non-stop. We may need to rely on the external control i.e. "interrupt request" to terminate the program execution.

Figure 4.26 Loop construct

3. Construct of decision making by Branch/Jump

With respond to the constraint of the basic loop construct, Figure 4.27 (a) and (b) shows another structure of loop construct where the program is allowed to decide whether or not to implement the loop function. Unlike the basic loop construct that requires external control, this is done by means of instruction within the program.

Figure 4.27 loop construct with Branch/Jump instructions

Structure in (a) will check the condition whether to do the loop function, after all the instructions have been executed. Whereas structure in (b) will check the condition whether to do the loop function, before all the instructions have been executed. It may need a small alteration on several control instructions in the program to change from one type to another. Both structure perform the loop function equally well, they just provide flexibility to execute then check or check then execute.

The power of branch and jump instructions are not limited to the conditional loop construct as in Figure 4.27, they are used to build variety of decision making constructs.

Figure 4.28 (a) shows one type of decision making construct, with either one (Yes or No) of the condition met will implement the instructions. This construct may be accomplished by only a branch instruction.

Figure 4.28 (b) another type of decision making construct, with both (Yes and No) of the condition met will implement own sets of instructions. This construct may be accomplished by a branch and two Jump instruction.

However, the selection of branch or jump instructions depends on the creativity of programmers or the complexitiy of branch and jump construct to be achieved, thus this two construct serve as a basic concept to start a complex task.

Labels "Enter" and 'Next" replace the normal label found in most flow charts i.e. "Start" and "End", have the emphasis that this block of process can be placed at any portion and as many times as possible within a program. In other words, it is used as one of the elements within a program.

(a) One-choice (b) Two-choices

Figure 4.28 General construct with Branch/Jump instructions

Control Construct: Quite often, the logic flow of a program is too complex for the program to be directly coded in assembly language. Two tools have commonly been used as programming aids. One is flowchart and the other is pseudocode. A pseudocode is a mixture of english and Pascal-like control construct used to describe the logic flow of a program.

The logic flow of a typical program can be broken down as combination of the following six basic control constructs in addition to simple sequencing:

(Source: Yu-Cheng Liu, Fig 3-17, pg 64-66)

You may find these control constructs familiar? Yes, you may be very much well verse with these instructions in other high-level programming languages such Pascal, C-Program, Visual Basic, and many others. Here, we will design control constructs in assembly language with the assistance of this friendly structures. Figure 4.29 to Figure 4.34 show examples of these six control constructs, each one has a flowchart, pseudocode construct and the assembly language instructions. By comparison, we can see the equivalent and differences to have better understanding.

Figure 4.29 IF-THEN

Figure 4.30 IF-THEN-ELSE

Figure 4.31 FOR LOOP

Figure 4.32 REPEAT-UNTIL

Figure 4.33 WHILE-DO

Figure 4.34 CASE

4. Construct of Subroutine

The subroutine concept is an approach to simplify a very long or complex program. There are several instructions in a program tend to be repeated to perform the similar function, or with a little alteration. Thus it is more practical to group these few instructions into a sub-program, and to be called whenever necessary by calling its name or label. This sub-program is normally referred as subroutine in M68000. In other words, a subroutine is a special segment of program that can be called for execution from any point in a program.

Figure 4.35 shows the subroutine concept. The same subroutine-A is called twice from the main program, just by a simple "CALL" instruction.

Figure 4.36 (a) shows a program calls a subrountine several times within a program. Figure 4.36 (b) shows a program to call several subroutines within a program.

The instructions to be used to handle subroutine is discussed in details in Unit 3.

4C-1:
The program construct consists of several steps, please sort the steps according to the flow of process. □ Programming. □ Documentation of the program. □ Definition of problem. □ Logical design. □ Test run the program.

4C-2:
Label the elements of a flow chart with the list given:

4C-3:
Give the “Syntax of a Monitor Command”, please state the four elements labeled as A, B, C, and D.

4C-1:
The program construct consists of several steps, please sort the steps according to the flow of process. 1. Definition of problem. 2. Logical design. 3. Programming. 4. Test run the program. 5. Documentation of the program.

4C-2:

4C-:
Give the “Syntax of a Monitor Command”, please state the four elements labeled as A, B, C, and D.

A: negative form (NO) B: command field C: parameters field D: options field.

You are approaching success. Try all the questions in this self-assessment section and check your answers with those given in the Feedback on Self-Assessment 1 given on the next page. If you face any problem, discuss it with your lecturer. Good Luck

4-1:
Assume initial data are given as follows, please calculate the effective address of source and destination operand.

Have you tried the question?????? If “YES”, check your answer now.

4-1:
Assume initial data are given as follows, please calculate the effective address of source and destination operand.

DUMP SITE:

Figure 4.3.2.1 Flow chart of loop construct

Figure 4.3.2.2 Instructions of loop construct

-----------------------
END

D1 ( Memory

D0 + D1 ( D1

Data1 ( D0
Data2 ( D1

START

END

Data3 ( Memory

Data1 + Data2 = Data3

Input data:
Data1 &
Data2

START

0 1 0 0 0 0 1 0 0 1 1 1 1 0 0 0

Example:
Assembly instruction: CLR.W $3000
Machine code:

Figure 4.16
Flow chart of process

End terminal

Connecting Arrows

Memory

EA

Extension word

Connector

Table 4.4 Incorrect instructions (Source: Yu-Cheng Liu, pg 38)
|Instruction |Error |
|CLR.W |(D3) |A data register may not be used in the indirect register addressing |
| | |mode. |
|CLR.W |$4(A1)+ |Displacement and postincrement may not be combined. |
|BEQ |(A1) |The EA addressing modes do not apply to branch instructions. |
|MOVE.W |D1,#12 |An immediate operand may not be used for the destination. |
|CLR.W |A1 |An address register may be used as the destination only in |
| | |address-related instructions. |
|MOVE.W |#$123456,D1 |The immediate operand is too large for a word operation. |
|MOVE.B |A1,D1 |An address register may not be accessed as a byte. |

Immediate operand

Immediate data at operand, follows the instruction opcode

Quick immediate operand

Immediate data within the instruction opcode

Immediate data
00 05 43 21

|02FFFF |XX |
|030000 |00 |
|030001 |05 |
|030002 |43 |
|030003 |21 |
|030004 |XX |

Sub-routine

Logical selection

Operation/ process

After execution:
| |31 |15 |7 |
| |16 |8 |0 |
|D2 | |04 |50 |
|D3 | | | |
|D4 | |61 |82 |

50
+ 32 82

Before execution:
| |31 |15 |7 |
| |16 |8 |0 |
|D2 | |04 |50 |
|D3 | | | |
|D4 | |61 |32 |

Input / Output

Start terminal

Description:
Add the content (byte) of D2, to the content (Byte) of D4.
The result is placed in D4; the original data in D4 is replaced with the sum.
< D2.B + D4.B ( D4.B >

Before execution:
| |31 |15 |7 |
| |16 |8 |0 |
|D2 | |04 |50 |
|D3 | | | |
|D4 | |61 |32 |

|Mode |Generation |
|Register Direct Addressing | |
|Data Register Direct |EA = Dn |
|Address Register Direct |EA = An |
|Absolute Data Addressing | |
|Absolute Short |EA = (Next Word) |
|Absolute Long |EA = (Next Two Words) |
|Program Counter Relative Addressing | |
|Relative with offset |EA = (PC) + d16 |
|Relative with index and offset |EA = (PC) + (Xn) + d8 |
|Register Indirect Addressing | |
|Register Indirect |EA = (An) |
|Postincrement Register Indirect |EA = (An), An ( An + N |
|Predecrement Register Indirect |An ( An-N, EA=(An) |
|Register Indirect with Offset |EA = (An) + d16 |
|Indexed Register Indirect with Offset |EA = (An) + (Xn) + d8 |
|Immediate Data Addressing | |
|Immediate |DATA = Next Word(s) |
|Quick Immediate |Inherent Data |
|Implied Addressing | |
|Implied Register |EA = SR, USP, SP, PC |

NOTES:
|EA = Effective Address |SR = Status register |N = 1 for Bte, 2 for Words, and|
|An = Address Register |PC = Program Counter |4 for Longwords. |
|Dn = Data Address |( ) = Content of .. |( = Replaces |
|Xn = Address or Data Register used as |d8 = 8 bit offset (displacement) | |
|index Register |d16 = 16 bit offset (displacement) | |

INPUT-4C

[pic]

FEEDBACK TO ACTIVITY - 4A

[pic]

TEST YOUR UNDERSTANDING BEFORE YOU CONTINUE TO THE NEXT INPUT….!

ACTIVITY – 4A

[pic]

INPUT-4B

[pic]

FAFA

1234

1234

013600

0001 0000 A6
+ 0000 3600 d16 01 3600

D5

11112400

D5

11112400

Sign-extended for Ai.W or Di.W

Ai or Di

Index

i

0 – Use data register for index
1 – Use an address register for index

Index register number

0 – 16 bit index
1 – 32 bit index

Register

8-bit displacement

15 14 12 11 10 8 7 0

Displacement

0 0 0

W/L

Register

D/A

0000 1234 A3 0000 2400 D5.W
+ FFFF FFFE d8 00 3632

A6

00010000

A6

00010000

013600

003632

1234

003632

Operation: MOVE.W -2(A3,D5.W),$3600(A6)

MOVE.W
($003632) ( ($013600)
($003633) ( ($013601)

Memory Location

Memory Location

After execution:

A3

00001234

Before execution:

A3

00001234

Assembler instruction : MOVE.W -2(A3,D5.W),$3600(A6) Machine code: Destination Source

Reg Mode Mode Reg

0 0 1 1 1 1 0 1 0 1 1 1 0 0 1 1 = 0011-1101-0111-0011 = 3D73

D/A Reg W/L Displacement

0 1 0 1 0 0 0 0 1 1 1 1 1 1 1 0 = 0101-0000-1111-1110 = 50FE Displacement: $3600

Overall Machine code: 3D7350FE3600

Sign-
Extended

Extension word 8-bit displacement

An

Memory

Operand

Memory address

Assembler syntax : d(An,Ri.X) [X= W for 16-bit index or L for 32-bit index]
EA calculation : EA = (An) + (Ri.X) (sign-extended if X = W) + d (sign-extended to 32-bits)

EA

Operation word n

52 54

002012

Operation:

MOVE.B ( D3

Operation word

Sign-extended

Operand

FEEDBACK TO SELF-ASSESSMENT 4

[pic]

[pic]

SELF-ASSESSMENT 4

FEEDBACK TO ACTIVITY – 4B

[pic]

TEST YOUR UNDERSTANDING BEFORE YOU CONTINUE TO THE NEXT INPUT….!

Memory Location

ACTIVITY – 4B

Memory Location

[pic]

000

Table 4.2 Effective address accessible by Absolute short addressing mode.
|Ass. syntax| | |
|XXXX |EA |Comment |
|0000 |000000 | |
| | |XXXX: 0000 – FFFF |
| | |EA : 000000 – 007FFF (32K) |
| | | |
| | |This address space CAN be accessed with absolute |
| | |short addressing mode |
|0001 |000001 | |
|: |: | |
|0123 |000123 | |
|: |: | |
|7FFE |007FFE | |
|7FFF |007FFF | |
| |008000 | |
| | |EA : 008000 – FF7FFFF |
| | |This address space CANNOT be accessed with |
| | |absolute short addressing mode |
| |008001 | |
| |: | |
| |: | |
| |FF7FFE | |
| |FF7FFF | |
|8000 |FF8000 | |
| | |XXXX : 8000 – FFFF |
| | |EA : FF8000 – FFFFFF (32K) |
| | | |
| | |This address space CAN be accessed with absolute |
| | |short addressing mode |
|8001 |FF8001 | |
|: |: | |
|ABCD |FFABCD | |
|: |: | |
|FFFE |FFFFFE | |
|FFFF |FFFFFF | |

Longword of #$54321 = $00054321

After execution:
| |31 |15 |7 |
| |16 |8 |0 |
|D4 | |F9 |49 |
|D5 | | | |
| | | | |
| |31 |15 |
| |16 |0 |
|A3 | |0817 |

F132
+ 0817 F949

Before execution:
| |31 |15 |7 |
| |16 |8 |0 |
|D4 | |F1 |32 |
|D5 | | | |
| | | | |
| |31 |15 |
| |16 |0 |
|A3 | |0817 |

Description:
Add the contents of A3, to the contents of D4. The result is placed in D4; the original data in D4 is replaced with the sum.
< A3.W + D4.W ( D4.W >

Machine code in Hex:
HHHH

Assembler listing:
ADD.W A3,D4

After execution:
| |31 |15 |7 |
| |16 |8 |0 |
|D2 | |04 |50 |
|D3 | | | |
|D4 | |65 |82 |

0450
+ 6132 6582

Before execution:
| |31 |15 |7 |
| |16 |8 |0 |
|D2 | |04 |50 |
|D3 | | | |
|D4 | |61 |32 |

Description:
Add the content (word) of D2, to the content (word) of D4. The result is placed in D4; the original data in D4 is replaced with the sum.
< D2.W + D4.W ( D4.W >

Machine code in Hex:
D842

After execution:

A5

00002000

Before execution:

A5

00002000

12345678

An

Memory

Operand

Memory address

Assembler syntax : d(An)
EA calculation : EA = (An) + d (sign-extended to 32-bits)

EA

Operation word n

101

Assembler instruction : MOVE.B 18(A5),D3 Machine code: Destination Source

Reg Mode Mode Reg

0 0 0 1 0 1 1 0 0 0 1 0 1 1 0 1 = 0001-0110-0010-1101 = 162D Displacement: 0012H (=18)

Overall Machine code: 162D0012

-1

CLR.B

12 00

003456

12 34

003456

Operation:

00 ( ($003457)

Memory Location

Memory Location

00002000 A5
+ 00000012 d16 002012

D3

After execution:

A3

00003457

Before execution:

A3

00003458

Assembler instruction : CLR.B -(A3) Machine code: Size Mode Reg

0 1 0 0 0 0 1 0 0 0 1 0 0 0 1 1 = 0100-0010-0010-0011 = 4223

Assembler instruction : CLR.B (A3)+ Machine code: Size Mode Reg

0 1 0 0 0 0 1 0 0 0 0 1 1 0 1 1 = 0100-0010-0001-1011 = 421B

+ 1 for byte
+2 for word
+4 for longword

Assembler instruction : CLR.L (A3) Machine code: Size Mode Reg

0 1 0 0 0 0 1 0 1 0 0 1 0 0 1 1 = 0100-0010-1001-0011= 4293

An

Memory

Operand

Memory address

Assembler syntax : (An)
EA calculation : EA = (An)

EA

Operation word

n

010

CLR.B

An

Memory

Operand

Memory address

Assembler syntax : (An)+
EA calculation : EA = (An) ; (An) + 1, 2 or 4 ( An

EA

Operation word n

010

- 1 for byte
- 2 for word
- 4 for longword

An

Memory

ADD.B D0,D1 ; D0 + D1 ( D1

From instruction list, the operation of this instruction:
ADD.B EA,Dn >> (EA) + Dn ( Dn

ADD.B D0,D1 >> D0 + D1 ( D1
D0 + D1 = $0C + $22 = $2E
D1 = $xxxxxx2E

Operand

Memory address

Assembler syntax : -(An)
EA calculation : EA = (An) - 1, 2 or 4 ( An ; EA = (An)

+1

00 9A

EA

Operation word n

100

Operation: : CLR.B (A3)+

012344

00 ( ($012344)

Memory Location

Memory Location

012344

78 9A

After execution:

A3

00012345

Before execution:

A3

Operation:

001234

0000

Carriage return, or

001234

1111

001238

YYYY

001236

0000

space

003000 1005 MOVE.B D5,D0? LEA $1000,A1 (cr)

003000 1005 MOVE.B D5,D0?_

The existing data of loaction at address $003000, which represent instruction MOVE.B D5,D0

Start address at $003000, set by command MM 3000:DI

003000 1005 MOVE.B D5,D0?_

Tutor 1.3 > MM 3000;DI (cr)

Tutor 1.3 > _

LEA $1000,A1 ;Source block starts at $1000 LEA $2000,A2 ;Destination block starts at $2000 MOVE.L #16,D0 ;Block length equals 16 words
NXTPT MOVE.W (A1)+,(A2)+ ;Move word and point to next word. SUBQ.L #1,D0 ;Update count BNE NXTPT ;Repeat for next word BRA HERE ;Branch to label HERE
HERE :

Tutor 1.3 > _

[NO] [] [;]

|Command mnemonics |Description |
|MD |Memory Display |
|MM, M |Memory Modify |
|MS |Memory Set |
|.A0 to .A7 |Display/Set Address Register |
|.D0 to .D7 |Display/Set Data Register |
|.PC |Display/Set Program Counter |
|.SR |Display/Set Status Register |
|.SS |Display/Set Supervisor Stack Pointer |
|.US |Display/Set User stack Pointer |
|DF |Display Formatted Registers |
|OF |Display Offsets |
|.R0 to .R6 |Display/Set Relative Offset Register |
|BF |Block of Memory Fill |
|BM |Block of Memory Move |
|BT |Block of Memory Test |
|BS |Block of Memory Search |
|DC |Data Conversion |
|BR |Breakpoint Set |
|NOBR |Breakpoint Remove |
|GO, G |Go |
|GT |Go Until Breakpoint |
|GD |Go Direct |
|TR, T |Trace |
|TT |Temporary Breakpoint Trace |
|PA |Printer Attach |
|NOPA |Reset Printer Attach |
|PF |Port Format |
|TM |Transparent Mode |
|* |Send Message to Port 2 |
|HE |Help |
|DU |Dump Memory |
|LO |Load |
|VE |Verify |

Next instruction

Call subroutine A

Subroutine A

:
:
:
:

Jump

Jump

Branch

Return

First instruction

Yes

:
:

Branch

Intructions

No

Instructions
:

LOOP

JUMP LOOP

START

Instructions
:

Condition
Met?

Intructions
Set A

COUNTER-1
BNZ LOOP

Yes

START

END

No

Condition
Met?

Instructions
:

COUNTER-1
BZ END

Intructions
Set B

END

Instruction-n

Instruction-1

Instruction-1

CLR.L ( ($001234)
($001235)
($001236)
($001237)

Memory Location

Memory Location

001232

XXXX

001232

XXXX

00012344

001238

YYYY

After execution:

A3

START

ORG $7000 ; The program initiled at address $7000 MOVE.B #12,D0 ; decimal data 12 stored in D0 MOVE.B #34,D1 ; decimal data 34 stored in D1 ADD.B D0,D1 ; D0 + D1 ( D1 MOVE.B D1,$7050 ; product of addition stored in memory at location $7050 END ; end program execution.

ORG $7000 MOVE.B #12,D0 MOVE.B #34,D1 ADD.B D0,D1 MOVE.B D1,$7050 END

Figure 4.17
Flow chart of instructions

.PC

TR

DF

T

TR

MM

The educational microcomputer board in your institution of studies may vary from the features of this system but the concept behind is the same. You are adviced to study the features provided by the educational system in your own institution.

The material in this unit just introduces the fundamental concept of programming, you are advised to further the skills of programming via lots of hands-on practises during the lab activities. Well, practice make perfect…
GOOD LUCK….

56001234

001236

2222

Before execution:

030220

A987

030220

A987

A2

00020030

A2

00020030

MOVE.L ( D1
($03021E)
($03021F)
($030220)
($030221)

Location

Location

56001234

03021E

FECB

A3

03021E

FECB

0 0 0 1 0 2 0 2 PC 0 0 0 2 0 0 3 0 A2
+ F F F F F F E C d8 0 3 0 2 1 E

D1

FECBA987

After execution:

PC

00010204

D1

44445555

Before execution:

PC

00010200

Index (Xn)
(limited to +838607 or -8388608 bytes)

Offset (d8)
(limited to +127 or -128 bytes)

| | |
|PC ( | |
| |Extension word |
| | |
| | |
| | |
|Table ( | |
| | |
| | |
| | |
| | |
|Address element ( | |
| | |

MOVE.W ( D3
($123202)
($123203)

Location

Location

Points to the next instruction

123202

5254

Points to the extension word after the op word is fetched

123202

5254

00122002 PC
+ 00001200 d16 123202

D3

12345254

After execution:

PC

0012004

D3

12345678

Instruction line to be entered

Before execution:

PC

0012000

Table 4.3 Comparison of effective address accessible by absolute short and absolute long addressing mode.

|Address |Absolute short |Absolute Long |
| |addressing mode |addressing mode |
|000000 |XXXX: 0000 – FFFF | |
| |EA : 000000 – 007FFF (32K) |EA : 000000 – FFFFFF. |
| |CAN be accessed. |The whole 24-bits of |
| | |address space CAN be |
| | |accessed with absolute |
| | |Long addressing mode |
|: | | |
|007FFF | | |
|008000 |EA : 008000 – FF7FFFF | |
| |CANNOT be accessed. | |
|: | | |
|FF7FFF | | |
|FF8000 |XXXX : 8000 – FFFF | |
| |EA : FF8000 – FFFFFF (32K) | |
| |CAN be accessed. | |
|: | | |
|FFFFFF | | |

Figure 4.1 Internal registers of MC68000

After:
|68000 |
|MA |PC |

|6789ABCD |D0 |
|: | |
|: | |
| |D7 |

Before:
|68000 |
|MA |PC |

|XXXXXXXX |D0 |
|: | |
|: | |
| |D7 |

MOVE.L $1234,D0
($001234).L ( D0
6789ABCD ( D0

|Address |Memory |Instruction |
| |Content | |
|MA |2038 |MOVE.L $1234,D0 |
|MA+2 |1234 | |
|MA+4 |XXXX |Next instruction |
| |: | |
| |: | |
|001234 |6789 | |
|001236 |ABCD | |

|68000 |
|HHHH HHHH |PC |

|HHHH HHHH |D0 |
|: | |
|: | |
|HHHH HHHH |D7 |

|HHHH HHHH |A0 |
|: | |
|: | |
|HHHH HHHH |A6 |

|HHHH HHHH |USP |
|HHHH HHHH |SSP |

|HHHH |SR |

111

16-bit displacement

TUTOR 1.3 > MM 3000;DI
003000 43F81000 LEA $1000,A1
003004 45F82000 LEA $2000,A2
003008 203C00000010 MOVE.L #16,D0
00300E 34D9 MOVE.W (A1)+,(A2)+
003010 5380 SUBQ.L #1,D0
003012 66FA BNE $300E
003014 60FE BRA *
003016 FFFF DC.W $FFFF? _

LEA $1000,A1 LEA $2000,A2 MOVE.L #16,D0
NXTPT MOVE.W (A1)+,(A2)+ SUBQ.L #1,D0 BNE NXTPT BRA HERE
HERE :

TUTOR 1.3 > MM 3000;DI
003000 43F81000 LEA $1000,A1
003004 45F82000 LEA $2000,A2
003008 203C00000010 MOVE.L #16,D0
00300E 34D9 MOVE.W (A1)+,(A2)+
003010 5380 SUBQ.L #1,D0
003012 66FA BNE $300E
003014 60FE BRA *
003016 FFFF DC.W $FFFF? _

TUTOR 1.3 > .PC 3000

TUTOR 1.3 > DF
PC=00003000 SR=2700=.S7….. US=FFFFFFFF SS=00000756
D0=0000FF0D D1=00000000 D2=12100010 D3=00000000
D4=00000231 D5=00000FFF D6=00000004 D7=00000000
A0=00010040 A1=00000000 A2=00000414 A3=00002500
A4=00009FAC A5=00000540 A6=00000540 A7=00000756
---------------------------------------003000 43F81000 LEA.L $00001000,A1

TUTOR 1.3 > TR
PHYSICAL ADDRESS=00003000
PC=00003004 SR=2700=.S7….. US=FFFFFFFF SS=00000756
D0=0000FF0D D1=00000000 D2=12100010 D3=00000000
D4=00000231 D5=00000FFF D6=00000004 D7=00000000
A0=00010040 A1=00001000 A2=00000414 A3=00002500
A4=00009FAC A5=00000540 A6=00000540 A7=00000756
---------------------------------------003004 43F82000 00000540 A7=00000756
---------------------------------------003004 43F82000 LEA.L $00002000,A2

TUTOR 1.3 > .PC
.PC=00003004

TUTOR 1.3 > _

Assembler syntax : XXXX ( 0 ≤ XXXX ≤ FFFF)
EA calculation : EA = XXXX (sign extended) (if XXXX: 0 ≤ 7FFF ( EA : 0 ≤ EA ≤ 007FFF) (if XXXX: 8000 ≤ FFFF ( EA : FF8000 ≤ EA ≤ FFFFFF )

Assembler listing:
ADD.W D2,D4

Table 4.1 Addressing modes and the effective address generation. (Source: Fig 2.10, Pg 29, Walter)

12345652

D3

Sign-
Extended

Extension word

16-bit displacement

110

52 54

002012

Tutor 1.3 > T (cr)

Tutor 1.3 > TR (cr)

003000 43F81000 LEA $1000,A1
003004 FFFF DC.W $FFFF ? _

[pic]

INPUT-4A

[pic]

OBJECTIVE

UNIT 4

Since we haven't identified the address of label "HERE", just type '*'
After we have identify the address, then replace the '*' with the address i.e. "$3016"

$3016

ORG $7000 ; The program initiled at address $7000
This is a assembler directive to store the opcodes of this program in the memory started at address $7000.

MOVE.B #12,D0 ; decimal data 12 stored in D0; end program execution.
From instruction list, the operation of this instruction:
MOVE.B SRC,DST >> (SRC EA) ( DST EA

MOVE.B #12,D0 >> #12( D0
Since: 1210 = 0CH; thus, D0 = $xxxxxx0C

MOVE.B #34,D1 ; decimal data 34 stored in D1

MOVE.B #34,D1 >> #34( D1
Since: 3410 = 22H; thus, D1 = $xxxxxx22

D0

XXXXXXXX

XXXXXX0C

Before

After

D1

XXXXXXXX

XXXXXX22

Before

After

D0

XXXXXX0C

XXXXXX0C

Before

After

D1

XXXXXX22

XXXXXX2E

MOVE.B D1,$7050 ; product of addition stored in memory at location $7050
From instruction list, the operation of this instruction:
MOVE.B SRC,DST >> (SRC EA) ( DST EA

MOVE.B D1,$7050 >> D1 ( M($7050)
$2E ( M($7050)

D1

XXXXXX2E

XXXXXX2E

Before

After

7050

XXXXXXXX

XXXXXX2E

END ; end program execution.

D1

XXXXXXXX

XXXXXX2E

Before

After

7050

XXXXXXXX

XXXXXX2E

D0

XXXXXXXX

XXXXXX0C

:
:

Next instruction

Call subroutine A

:
:

Figure 4.35 Subroutine concept

START

START

START

(b) several Subroutines to be called within a program

Figure 4.36 Flow chart for Subroutine construct

(a) A subroutine to be called several times

Call
Sub-rountine-1

Instructions

Sub-rountine-2

END

JUMP LOOP

LOOP

LOOP

(b) Execute task then check condition of loop

(c) Check condition of loop then execute task

(a) Basic loop

If Zero(END

START

If Not Zero
(LOOP

If Zero
(END

(LOOP

Sub-rountine-1

Call
Sub-rountine-1

END

Instructions

START

Instructions

Call
Sub-rountine-1

Instructions

Sub-rountine-1

Instructions

Call
Sub-rountine-2

Instructions

Call
Sub-rountine-1

Instructions

START

END

(LOOP

(b) Execute task then check condition of loop

(c) Check condition of loop then execute task

(a) Basic loop

END

END

No

Instruction-n

Instructions

Condition
Met?

Yes

Yes

Instruction-1

No

Instructions

Instruction-1

Condition
Met?

START

Instruction-n

Instruction-2

(a) Flow chart

Instruction-1

(LOOP

END

(b) Instructions

START

LOOP
Instructions
:
:
JUMP LOOP

(a) Execute task then check condition of loop

No

Yes

Condition
Met?

Instructions

END

START

Condition
Met?

(b) Check condition of loop then execute task

No

Yes

Instructions

If Not Zero
(LOOP

If Zero(END

Next instructon

END

END

START
:
Set Counter

COUNTER-1
BNZ LOOP

CMPI.W #10,VARA BNE NEXT : :
NEXT : :

a) IF condition THEN action 1; b) IF condition THEN action 1 ELSE action 2; c) FOR counter = initial TO final value DO action 1; d) REPEAT action 1 UNTIL condition; e) WHILE condition DO action 1; f) CASE selector OF action 1, action 2, : action n;

START
:
Set Counter

Next

Enter

Next

Enter

If Not Zero,
Execute instructions

LOOP
Instructions
:

(LOOP

If Zero(END

LOOP COUNTER-1
BZ LOOP

Instructions
:
JUMP LOOP

LOOP

LOOP

IF A = 10 THEN Action 1

Action 1 : :

T

F

Action 1

Condition

Action 1

Action 2

TST.W VARA BLE NEXT1 : : BRA NEXT
NEXT1 : :
NEXT : :

IF A [< C >] [;< D>]

[A] < B > [< C >] [;< D>]

|Registers |Data |
|A3 |7080 1130 |
|A5 |2046 2258 |
|A6 |6789 0080 |
|D3 |1122 3344 |
|D5 |5566 7788 |

|Sample instruction |Source Operand |Destination Operand |
|CLR.B (A5) |EA = (A5) = 462258 |$00 ( (462258.B) |
| | |462258= 00 |
|CLR.W (A5) |EA = (A3) = 462258 |$0000 ( (462258.W) |
| | |462258= 00 |
| | |462259= 00 |
|CLR.L (A5) |EA = (A3) = 462258 |$0000 ( (462258.L) |
| | |462258= 00 |
| | |462259= 00 |
| | |46225A= 00 |
| | |46225B= 00 |

|Registers |Data |
|A3 |7080 1130 |
|A5 |2046 2258 |

|Registers |Data |
|A3 |7080 1130 |
|A5 |2046 2258 |
|A6 |6789 0080 |
|D3 |1122 3344 |
|D5 |5566 7788 |

|Sample instruction |Source Operand |Destination Operand |
|CLR.L (A3) |Nil |M(801130) |
|CLR.B (A3)+ | | |
|CLR.B –(A3) | | |
|MOVE.B 18(A5),D3 | | |
|MOVE.W -2(A3,D5.W), $3600(A6) | | |

(h)

|Sample instruction |Source Operand |Destination Operand |
|CLR.B (A3) |EA = (A3) = 801130 |$00 ( (801130.B) |
| | |801130 = 00 |
|CLR.W (A3) |EA = (A3) = 801130 |$0000 ( (801130.W) |
| | |801130 = 00 |
| | |801131 = 00 |
|CLR.L (A3) |EA = (A3) = 801130 |$0000 ( (801130.L) |
| | |801130 = 00 |
| | |801131 = 00 |
| | |801132 = 00 |
| | |801133 = 00 |

|Registers |Data |
|A3 |7080 1130 |
|A5 |2046 2258 |

(b)

(a)

• Logical selection Start terminal
• Operation/ process
• End terminal
• Connector
• Input / Output
• Sub-routine
• Connecting Arrows

a. Start terminal
b. Input / Output
c. Operation/ process
d. Logical selection
e. Sub-routine
f. Connector
g. Connecting Arrows
h. End terminal

-----------------------
ADDRESSING MODE AND PROGRAMMING