...Most I/O devices interface to the CPU in a fashion quite similar to memory. Indeed, many devices appear to the CPU as though they were memory devices. To output data to the outside world the CPU simply stores data into a "memory" location and the data magically appears on some connectors external to the computer. Similarly, to input data from some external device, the CPU simply transfers data from a "memory" location into the CPU; this "memory" location holds the value found on the pins of some external connector. An output port is a device that looks like a memory cell to the computer but contains connections to the outside world. An I/O port typically uses a latch rather than a flip-flop to implement the memory cell. When the CPU writes to the address associated with the latch, the latch device captures the data and makes it available on a set of wires external to the CPU and memory system (see Figure 7.1). Note that output ports can be write-only, or read/write. The port in Figure 7.1, for example, is a write-only port. Since the outputs on the latch do not loop back to the CPU's data bus, the CPU cannot read the data the latch contains. Both the address decode and write control lines must be active for the latch to operate; when reading from the latch's address the decode line is active, but the write control line is not. Figure 7.1 A Typical Output Port Figure 7.2 shows how to create a read/write input/output port. The data written to the output port loops...
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...Chapter 6 - Exercises 1. [10 points] What is memory mapped I/O? An I/O scheme in which portions of address space are assigned to I/O devices, and reads and writes to those addresses are interpreted as commands to the I/O device 2. [10 points] Why is DMA an improvement over CPU programmed I/O? When CPU programmed I/O is used the CPU is usually fully occupied for the entire duration of the read or write operation and is unavailable to perform other work. With DMA the CPU initiates the transfer, does other operations while the transfer is in progress, and receives an interrupt form the DMA controller when the operation is complete. This frees up the CPU for other tasks. 3. [10 points] When would DMA transfer be a poor choice? When the amount of data transferred between memory and the I\O device is small. In this case the work to set it up would be more than the benefits of having it. 4. [15 points] Mention two advantages and disadvantages for using a single bus as a shared communication link between memory, processor and I/O devices. Advantages: versatility and low cost Disadvantages: communication bottleneck 5. [15 points] What is the average time to read or write a 512-byte sector for a typical disk rotating at 7200 RPM? The advertised average seek time is 8ms, the transfer rate is 20MB/sec, and the controller overhead is 2ms. Assume that the disk is idle so that there is no waiting time. -8 + (.5*60*1000/7200) + (512/20*2^20) * 1000...
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