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The 8051 Microcontroller and Embedded Systems Using Assembly and C
Second Edition

Muhammad Ali Mazidi Janice Gillispie Mazidi Rolin D. McKinlay

CONTENTS Introduction to Computing The 8051 Microcontrollers 8051 Assembly Language Programming Branch Instructions I/O Port Programming 8051 Addressing Modes Arithmetic & Logic Instructions And Programs 8051 Programming in C 8051 Hardware Connection and Hex File 8051 Timer/Counter Programming in Assembly and C 8051 Serial Port Programming in Assembly and C Interrupts Programming in Assembly and C 8051 Interfacing to External Memory 8051 Real World Interfacing I: LCD,ADC AND SENSORS LCD and Keyboard Interfacing 8051 Interfacing with 8255

INTRODUCTION TO COMPUTING
The 8051 Microcontroller and Embedded Systems: Using Assembly and C
Mazidi, Mazidi and McKinlay

Chung-Ping Young 楊中平
Home Automation, Networking, and Entertainment Lab

Dept. of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

OUTLINES

Numbering and coding systems Digital primer Inside the computer

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2

NUMBERING AND CODING SYSTEMS Decimal and Binary Number Systems

Human beings use base 10 (decimal) arithmetic
There are 10 distinct symbols, 0, 1, 2, …, 9

Computers use base 2 (binary) system
There are only 0 and 1 These two binary digits are commonly referred to as bits

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3

NUMBERING AND CODING SYSTEMS Converting from Decimal to Binary

Divide the decimal number by 2 repeatedly Keep track of the remainders Continue this process until the quotient becomes zero Write the remainders in reverse order to obtain the binary number
Ex. Convert 2510 to binary Quotient Remainder 25/2 = 12 1 LSB (least significant bit) 12/2 = 6 0 6/2 = 3 0 3/2 = 1 1 1/2 = 0 1 MSB (most significant bit) Therefore 2510 = 110012
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NUMBERING AND CODING SYSTEMS

Know the weight of each bit in a binary number Add them together to get its decimal equivalent
21 20

Converting Ex. Convert 110012 to decimal from Binary to Weight: 24 23 22 Decimal Digits: 1 1 0
Sum: 16 + 8+ 0+

0 0+

1 1 = 2510

Use the concept of weight to convert a decimal number to a binary directly
Ex. Convert 3910 to binary 32 + 0 + 0 + 4 + 2 + 1 = 39 Therefore, 3910 = 1001112
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5

NUMBERING AND CODING SYSTEMS Hexadecimal System

Base 16, the

hexadecimal system, is used as a convenient representation of binary numbers ex. It is much easier to represent a string of 0s and 1s such as 100010010110 as its hexadecimal equivalent of 896H

Decimal 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Binary 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111

Hex 0 1 2 3 4 5 6 7 8 9 A B C D E F

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6

NUMBERING AND CODING SYSTEMS

To represent a binary number as its equivalent hexadecimal number
Start from the right and group 4 bits at a time, replacing each 4-bit binary number with its hex equivalent

Converting between Binary Ex. Represent binary 100111110101 in hex 1001 1111 0101 and Hex
= 9 F 5

To convert from hex to binary
Each hex digit is replaced with its 4-bit binary equivalent
Ex. Convert hex 29B to binary 2 =
HANEL

9 1001

B 1011
7

0010

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NUMBERING AND CODING SYSTEMS Converting from Decimal to Hex

Convert to binary first and then convert to hex Convert directly from decimal to hex by repeated division, keeping track of the remainders
Ex. Convert 4510 to hex 32 1 16 0 8 1 4 1 2 0 1 1 32 + 8 + 4 + 1 = 45

4510 = 0010 11012 = 2D16 Ex. Convert 62910 to hex 512 256 128 64 32 16 8 4 2 1 1 0 0 1 1 1 0 1 0 1 62910 = 512+64+32+16+4+1 = 0010 0111 01012 = 27516
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8

NUMBERING AND CODING SYSTEMS Converting from Hex to Decimal

Convert from hex to binary and then to decimal Convert directly from hex to decimal by summing the weight of all digits
Ex. 6B216 = 0110 1011 00102 1024 512 256 128 64 32 16 8 4 2 1 1 1 0 1 0 1 1 0 0 1 0 1024 + 512 + 128 + 32 + 16 + 2 = 171410

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NUMBERING AND CODING SYSTEMS Addition of Hex Numbers

Adding the digits together from the least significant digits
If the result is less than 16, write that digit as the sum for that position If it is greater than 16, subtract 16 from it to get the digit and carry 1 to the next digit
Ex. Perform hex addition: 23D9 + 94BE 23D9 + 94BE B897 LSD: 9 1 1 MSD: 2 + + + + 14 = 23 13 + 11 = 25 3+4=8 9=B 23 – 16 = 7 w/ carry 25 – 16 = 9 w/ carry

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NUMBERING AND CODING SYSTEMS Subtraction of Hex Numbers

If the second digit is greater than the first, borrow 16 from the preceding digit
Ex. Perform hex subtraction: 59F – 2B8 59F – 2B8 2E7 LSD: 15 – 8 = 7 9 + 16 – 11 = 14 = E16 5–1–2=2

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NUMBERING AND CODING SYSTEMS ASCII Code

The ASCII (pronounced “ask-E”) code assigns binary patterns for
Numbers 0 to 9 All the letters of English alphabet, uppercase and lowercase Many control codes and punctuation marks

The ASCII system uses 7 bits to represent each code
Hex Symbol
A B C D ... Y Z

Hex
61 62 63 64 ... 79 7A

Symbol a b c d … y z
12

Selected ASCII codes

41 42 43 44 ... 59 5A

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DIGITAL PRIMER Binary Logic

Two voltage levels can be represented as the two digits 0 and 1 Signals in digital electronics have two distinct voltage levels with built-in tolerances for variations in the voltage A valid digital signal should be within either of the two shaded areas
5 4 3 2 1 0 Logic 1

Logic 0

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DIGITAL PRIMER Logic Gates

AND gate

Computer Science Illuminated, Dale and Lewis

OR gate

Computer Science Illuminated, Dale and Lewis

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14

DIGITAL PRIMER Logic Gates
(cont’)

Tri-state buffer Inverter

Computer Science Illuminated, Dale and Lewis

XOR gate

Computer Science Illuminated, Dale and Lewis

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DIGITAL PRIMER Logic Gates
(cont’)

NAND gate

Computer Science Illuminated, Dale and Lewis

NOR gate

Computer Science Illuminated, Dale and Lewis

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DIGITAL PRIMER Logic Design Using Gates

Half adder

Full adder

Digital Design, Mano

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DIGITAL PRIMER
4-bit adder

Logic Design Using Gates
(cont’)

Digital Design, Mano

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DIGITAL PRIMER Logic Design Using Gates
(cont’)

Decoders
Decoders are widely used for address decoding in computer design
Address Decoders

Address decoder for 9 (10012) The output will be 1 if and only if the input is 10012

Address decoder for 5 (01012) The output will be 1 if and only if the input is 01012

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19

DIGITAL PRIMER Logic Design Using Gates
(cont’)

Flip-flops
Flip-flops are frequently used to store data

Digital Design, Mano

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20

INSIDE THE COMPUTER Important Terminology

The unit of data size
Bit : a binary digit that can have the value
0 or 1 Byte : 8 bits Nibble : half of a bye, or 4 bits Word : two bytes, or 16 bits

The terms used to describe amounts of memory in IBM PCs and compatibles
Kilobyte (K): 210 bytes Megabyte (M) : 220 bytes, over 1 million Gigabyte (G) : 230 bytes, over 1 billion Terabyte (T) : 240 bytes, over 1 trillion
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INSIDE THE COMPUTER Internal Organization of Computers

CPU (Central Processing Unit) I/O (Input/output) devices Memory

Execute information stored in memory Provide a means of communicating with CPU RAM (Random Access Memory) – temporary storage of programs that computer is running ROM (Read Only Memory) – contains programs and information essential to operation of the computer
The data is lost when computer is off

The information cannot be changed by use, and is not lost when power is off – It is called nonvolatile memory

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22

INSIDE THE COMPUTER Internal Organization of Computers
(cont’) Address bus Peripherals (monitor, printer, etc.)

Memory

CPU

(RAM, ROM)

Data bus

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23

INSIDE THE COMPUTER Internal Organization of Computers
(cont’)

The CPU is connected to memory and I/O through strips of wire called a bus
Carries information from place to place
Address bus Data bus Control bus Address bus

CPU

RAM

ROM

Printer

Disk

Monitor

Keyboard

Read/ Write

Data bus Control bus

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24

INSIDE THE COMPUTER Internal Organization of Computers
(cont’)

Address bus
For a device (memory or I/O) to be recognized by the CPU, it must be assigned an address
The address assigned to a given device must be unique The CPU puts the address on the address bus, and the decoding circuitry finds the device

Data bus
The CPU either gets data from the device or sends data to it

Control bus
Provides read or write signals to the device to indicate if the CPU is asking for information or sending it information
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25

INSIDE THE COMPUTER More about Data Bus

The more data buses available, the better the CPU
Think of data buses as highway lanes

More data buses mean a more expensive CPU and computer
The average size of data buses in CPUs varies between 8 and 64

Data buses are bidirectional
To receive or send data

The processing power of a computer is related to the size of its buses

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INSIDE THE COMPUTER More about Address Bus

The more address buses available, the larger the number of devices that can be addressed The number of locations with which a CPU can communicate is always equal to 2x, where x is the address lines, regardless of the size of the data bus ex. a CPU with 24 address lines and 16 data lines can provide a total of 224 or 16M bytes of addressable memory Each location can have a maximum of 1 byte of data, since all general-purpose CPUs are byte addressable

The address bus is unidirectional
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INSIDE THE COMPUTER CPU’s Relation to RAM and ROM

For the CPU to process information, the data must be stored in RAM or ROM, which are referred to as primary ROM provides information that is fixed and permanent
Tables or initialization program

memory

RAM stores information that is not permanent and can change with time
Various versions of OS and application packages CPU gets information to be processed

first form RAM (or ROM) if it is not there, then seeks it from a mass storage device, called secondary memory, and transfers the information to RAM

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INSIDE THE COMPUTER Inside CPUs

Registers
The CPU uses registers to store information temporarily
Values to be processed Address of value to be fetched from memory

In general, the more and bigger the registers, the better the CPU
Registers can be 8-, 16-, 32-, or 64-bit The disadvantage of more and bigger registers is the increased cost of such a CPU

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Address Bus

INSIDE THE COMPUTER Inside CPUs
(cont’)

Program Counter

Instruction Register Flags ALU Instruction decoder, timing, and control Internal buses

Control Bus Data Bus

Register A Register B Register C Register D

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INSIDE THE COMPUTER Inside CPUs
(cont’)

ALU (arithmetic/logic unit)
Performs arithmetic functions such as add, subtract, multiply, and divide, and logic functions such as AND, OR, and NOT

Program counter
Points to the address of the next instruction to be executed
As each instruction is executed, the program counter is incremented to point to the address of the next instruction to be executed

Instruction decoder
Interprets the instruction fetched into the CPU
A CPU capable of understanding more instructions requires more transistors to design
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31

INSIDE THE COMPUTER Internal Working of Computers

Ex. A CPU has registers A, B, C, and D and it has an 8-bit data bus and a 16-bit address bus. The CPU can access memory from addresses 0000 to FFFFH Assume that the code for the CPU to move a value to register A is B0H and the code for adding a value to register A is 04H The action to be performed by the CPU is to put 21H into register A, and then add to register A values 42H and 12H ...

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32

INSIDE THE COMPUTER Internal Working of Computers
(cont’)

Ex. (cont’) Action
Move value 21H into reg. A Add value 42H to reg. A Add value 12H to reg. A

Code
B0H 04H 04H

Data
21H 42H 12H

Mem. addr.
1400 1401 1402 1403 1404 1405 1406

(B0) code for moving a value to register A (21) value to be moved (04) code for adding a value to register A (42) value to be added (04) code for adding a value to register A (12) value to be added (F4) code for halt

Contents of memory address

...

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33

INSIDE THE COMPUTER Internal Working of Computers
(cont’)

Ex. (cont’) The actions performed by CPU are as follows: 1. The program counter is set to the value 1400H, indicating the address of the first instruction code to be executed
2.

The CPU puts 1400H on address bus and sends it out
The memory circuitry finds the location

The CPU activates the READ signal, indicating to memory that it wants the byte at location 1400H

以動畫表示
...

This causes the contents of memory location 1400H, which is B0, to be put on the data bus and brought into the CPU

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34

INSIDE THE COMPUTER Internal Working of Computers
(cont’)

Ex. (cont’)
3.

The CPU decodes the instruction B0 The CPU commands its controller circuitry to bring into register A of the CPU the byte in the next memory location
The value 21H goes into register A

The program counter points to the address of the next instruction to be executed, which is 1402H
Address 1402 is sent out on the address bus to fetch the next instruction

...

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35

INSIDE THE COMPUTER Internal Working of Computers
(cont’)

Ex. (cont’)
4.

From memory location 1402H it fetches code 04H After decoding, the CPU knows that it must add to the contents of register A the byte sitting at the next address (1403) After the CPU brings the value (42H), it provides the contents of register A along with this value to the ALU to perform the addition
It then takes the result of the addition from the ALU’s output and puts it in register A The program counter becomes 1404, the address of the next instruction

...

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36

INSIDE THE COMPUTER Internal Working of Computers
(cont’)

Ex. (cont’)
5.

Address 1404H is put on the address bus and the code is fetched into the CPU, decoded, and executed
This code is again adding a value to register A The program counter is updated to 1406H
6.

The contents of address 1406 are fetched in and executed This HALT instruction tells the CPU to stop incrementing the program counter and asking for the next instruction

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37

8051 MICROCONTROLLERS
The 8051 Microcontroller and Embedded Systems: Using Assembly and C
Mazidi, Mazidi and McKinlay

Chung-Ping Young 楊中平
Home Automation, Networking, and Entertainment Lab

Dept. of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

OUTLINES

Microcontrollers and embedded processors Overview of the 8051 family

HANEL

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2

MICROCONTROLLERS AND EMBEDDED PROCESSORS Microcontroller vs. GeneralPurpose Microprocessor

General-purpose microprocessors contains
No RAM No ROM No I/O ports

Microcontroller has
CPU (microprocessor) RAM ROM I/O ports Timer ADC and other peripherals
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3

MICROCONTROLLERS AND EMBEDDED PROCESSORS Microcontroller vs. GeneralPurpose Microprocessor
(cont’)

Generalpurpose MicroProcessor

Data bus
I/O Port
Serial COM Port

RAM

ROM

Timer

CPU Address bus

Microcontroller

CPU

RAM

ROM Serial COM Port

I/O

Timer

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4

MICROCONTROLLERS AND EMBEDDED PROCESSORS Microcontroller vs. GeneralPurpose Microprocessor
(cont’)

General-purpose microprocessors
Must add RAM, ROM, I/O ports, and timers externally to make them functional Make the system bulkier and much more expensive Have the advantage of versatility on the amount of RAM, ROM, and I/O ports

Microcontroller
The fixed amount of on-chip ROM, RAM, and number of I/O ports makes them ideal for many applications in which cost and space are critical In many applications, the space it takes, the power it consumes, and the price per unit are much more critical considerations than the computing power
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5

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MICROCONTROLLERS AND EMBEDDED PROCESSORS Microcontrollers for Embedded Systems

An embedded product uses a microprocessor (or microcontroller) to do one task and one task only
There is only one application software that is typically burned into ROM

A PC, in contrast with the embedded system, can be used for any number of applications
It has RAM memory and an operating system that loads a variety of applications into RAM and lets the CPU run them A PC contains or is connected to various embedded products
Each one peripheral has a microcontroller inside it that performs only one task

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6

MICROCONTROLLERS AND EMBEDDED PROCESSORS Microcontrollers for Embedded Systems
(cont’)

Home
Appliances, intercom, telephones, security systems, garage door openers, answering machines, fax machines, home computers, TVs, cable TV tuner, VCR, camcorder, remote controls, video games, cellular phones, musical instruments, sewing machines, lighting control, paging, camera, pinball machines, toys, exercise equipment

Office
Telephones, computers, security systems, fax machines, microwave, copier, laser printer, color printer, paging

Auto
Trip computer, engine control, air bag, ABS, instrumentation, security system, transmission control, entertainment, climate control, cellular phone, keyless entry

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7

MICROCONTROLLERS AND EMBEDDED PROCESSORS x86 PC Embedded Applications

Many manufactures of general-purpose microprocessors have targeted their microprocessor for the high end of the embedded market
There are times that a microcontroller is inadequate for the task

When a company targets a generalpurpose microprocessor for the embedded market, it optimizes the processor used for embedded systems Very often the terms embedded processor and microcontroller are used interchangeably
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8

MICROCONTROLLERS AND EMBEDDED PROCESSORS x86 PC Embedded Applications
(cont’)

One of the most critical needs of an embedded system is to decrease power consumption and space In high-performance embedded processors, the trend is to integrate more functions on the CPU chip and let designer decide which features he/she wants to use In many cases using x86 PCs for the high-end embedded applications
Saves money and shortens development time
A vast library of software already written Windows is a widely used and well understood platform

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9

MICROCONTROLLERS AND EMBEDDED PROCESSORS Choosing a Microcontroller

8-bit microcontrollers
Motorola’s 6811 Intel’s 8051 Zilog’s Z8 Microchip’s PIC

There are also 16-bit and 32-bit microcontrollers made by various chip makers

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MICROCONTROLLERS AND EMBEDDED PROCESSORS Criteria for Choosing a Microcontroller

Meeting the computing needs of the task at hand efficiently and cost effectively
Speed Packaging Power consumption The amount of RAM and ROM on chip The number of I/O pins and the timer on chip How easy to upgrade to higherperformance or lower power-consumption versions Cost per unit
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MICROCONTROLLERS AND EMBEDDED PROCESSORS Criteria for Choosing a Microcontroller
(cont’)

Availability of software development tools, such as compilers, assemblers, and debuggers Wide availability and reliable sources of the microcontroller
The 8051 family has the largest number of diversified (multiple source) suppliers
Intel (original) Atmel Philips/Signetics AMD Infineon (formerly Siemens) Matra Dallas Semiconductor/Maxim

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12

OVERVIEW OF 8051 FAMILY 8051 Microcontroller

Intel introduced 8051, referred as MCS51, in 1981
The 8051 is an 8-bit processor
The CPU can work on only 8 bits of data at a time

The 8051 had
128 bytes of RAM 4K bytes of on-chip ROM Two timers One serial port Four I/O ports, each 8 bits wide 6 interrupt sources

The 8051 became widely popular after allowing other manufactures to make and market any flavor of the 8051, but remaining code-compatible
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13

OVERVIEW OF 8051 FAMILY 8051 Microcontroller
(cont’)

External Interrupts Counter Inputs

Interrupt Control

On-chip ROM for code

On-chip RAM

Etc. Timer 0 Timer 1

CPU

OSC

Bus Control

I/O Ports
P0 P1 P2 P3

Serial Port
TXD RXD

Address/Data
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OVERVIEW OF 8051 FAMILY 8051 Family

The 8051 is a subset of the 8052 The 8031 is a ROM-less 8051
Add external ROM to it You lose two ports, and leave only 2 ports for I/O operations
Feature ROM (on-chip program space in bytes) RAM (bytes) Timers I/O pins Serial port Interrupt sources 8051 8052 8031 4K 128 2 32 1 6 8K 256 3 32 1 8 0K 128 2 32 1 6
15

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OVERVIEW OF 8051 FAMILY Various 8051 Microcontrollers

8751 microcontroller
UV-EPROM
PROM burner UV-EPROM eraser takes 20 min to erase

AT89C51 from Atmel Corporation
Flash (erase before write)
ROM burner that supports flash A separate eraser is not needed

DS89C4x0 from Dallas Semiconductor, now part of Maxim Corp.
Flash
Comes with on-chip loader, loading program to on-chip flash via PC COM port
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16

OVERVIEW OF 8051 FAMILY Various 8051 Microcontrollers
(cont’)

DS5000 from Dallas Semiconductor
NV-RAM (changed one byte at a time), RTC (real-time clock)
Also comes with on-chip loader

OTP (one-time-programmable) version of 8051 8051 family from Philips
ADC, DAC, extended I/O, and both OTP and flash

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17

8051 ASSEMBLY LANGUAGE PROGRAMMING
The 8051 Microcontroller and Embedded Systems: Using Assembly and C
Mazidi, Mazidi and McKinlay

Chung-Ping Young 楊中平
Home Automation, Networking, and Entertainment Lab

Dept. of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

INSIDE THE 8051 Registers

Register are used to store information temporarily, while the information could be a byte of data to be processed, or an address pointing to the data to be fetched

The vast majority of 8051 register are 8-bit registers
There is only one data type, 8 bits

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2

INSIDE THE 8051 Registers
(cont’)

The 8 bits of a register are shown from MSB D7 to the LSB D0
With an 8-bit data type, any data larger than 8 bits must be broken into 8-bit chunks before it is processed most significant bit least significant bit

D7

D6

D5

D4

D3

D2

D1

D0

8 bit Registers

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3

INSIDE THE 8051 Registers
(cont’)

The most widely used registers
A (Accumulator)
For all arithmetic and logic instructions

B, R0, R1, R2, R3, R4, R5, R6, R7 DPTR (data pointer), and PC (program counter)
A B R0 R1 R2 R3 R4 R5 R6 R7

DPTR PC

DPH

DPL

PC (Program counter)

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4

INSIDE THE 8051 MOV Instruction

MOV destination, source

;copy source to dest.

The instruction tells the CPU to move (in reality, COPY) the source operand to the destination operand
“#” signifies that it is a value MOV MOV MOV MOV MOV MOV A,#55H R0,A R1,A R2,A R3,#95H A,R3 ;load value 55H into reg. A ;copy contents of A into R0 ;(now A=R0=55H) ;copy contents of A into R1 ;(now A=R0=R1=55H) ;copy contents of A into R2 ;(now A=R0=R1=R2=55H) ;load value 95H into R3 ;(now R3=95H) ;copy contents of R3 into A ;now A=R3=95H

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INSIDE THE 8051 MOV Instruction
(cont’)

Notes on programming
Value (proceeded with #) can be loaded directly to registers A, B, or R0 – R7
MOV A, #23H MOV R5, #0F9H
Add a 0 to indicate that F is a hex number and not a letter If it’s not preceded with #, it means to load from a memory location

If values 0 to F moved into an 8-bit register, the rest of the bits are assumed all zeros
“MOV A, #5”, the result will be A=05; i.e., A = 00000101 in binary

Moving a value that is too large into a register will cause an error
MOV
HANEL

A, #7F2H ; ILLEGAL: 7F2H>8 bits (FFH)
6

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INSIDE THE 8051 ADD Instruction

ADD A, source

;ADD the source operand

;to the accumulator The ADD instruction tells the CPU to add the source byte to register A and put the result in register A Source operand can be either a register or immediate data, but the destination must always be register A
“ADD R4, A” and “ADD R2, #12H” are invalid since A must be the destination of any arithmetic operation MOV A, #25H ;load 25H into A MOV R2, #34H ;load 34H into R2 ADD A, R2 ;add R2 to Accumulator ;(A = A + R2) MOV A, #25H ;load one operand ;into A (A=25H) ADD A, #34H ;add the second ;operand 34H to A
7

There are always many ways to write the same program, depending on the registers used HANEL

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8051 ASSEMBLY PROGRAMMING

In the early days of the computer, programmers coded in machine language, consisting of 0s and 1s
Tedious, slow and prone to error

Structure of Assembly Language

Assembly languages, which provided

mnemonics for the machine code instructions, plus other features, were developed
An Assembly language program consist of a series of lines of Assembly language instructions

Assembly language is referred to as a low-

level language

It deals directly with the internal structure of the CPU

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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

8

Assembly language instruction includes
8051 ASSEMBLY PROGRAMMING

a mnemonic (abbreviation easy to remember) the commands to the CPU, telling it what those to do with those items

Structure of Assembly Language

optionally followed by one or two operands the data items being manipulated

A given Assembly language program is a series of statements, or lines
Assembly language instructions
Tell the CPU what to do

Directives (or pseudo-instructions)
Give directions to the assembler

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9

8051 ASSEMBLY PROGRAMMING

An Assembly language instruction consists of four fields:
[label:] Mnemonic [operands] [;comment]
ORG 0 MOV MOV MOV ADD 0H R5, #25H R7, #34H A, #0 A, R5 ;start(origin) at location

Structure of Assembly Language

;load 25H into R5 ;load 34H into R7 Directives do not ;load 0 into generate any machine A code R5 to A ;add contents ofand are used ;now A = A + only by the assembler R5 Mnemonics ADD A, R7 ;add contents of R7 to A produce ;now A = A + R7 opcodes ADD A, #12H ;add to A value 12H ;now A = A + 12H HERE: SJMP HERE ;stay in this loop END ;end of asm may be at the end of a Comments source file line or on a line by themselves The label field allows the program to refer to a The assembler ignores comments line of code by name
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HANEL

ASSEMBLING AND RUNNING AN 8051 PROGRAM

The step of Assembly language program are outlines as follows:
1)

First we use an editor to type a program, many excellent editors or word processors are available that can be used to create and/or edit the program
Notice that the editor must be able to produce an ASCII file For many assemblers, the file names follow the usual DOS conventions, but the source file has the extension “asm“ or “src”, depending on which assembly you are using

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11

ASSEMBLING AND RUNNING AN 8051 PROGRAM
(cont’)

2)

The “asm” source file containing the program code created in step 1 is fed to an 8051 assembler
The assembler converts the instructions into machine code The assembler will produce an object file and a list file The extension for the object file is “obj” while the extension for the list file is “lst”

3)

Assembler require a third step called

linking

The linker program takes one or more object code files and produce an absolute object file with the extension “abs” This abs file is used by 8051 trainers that have a monitor program

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12

ASSEMBLING AND RUNNING AN 8051 PROGRAM
(cont’)

4)

Next the “abs” file is fed into a program called “OH” (object to hex converter) which creates a file with extension “hex” that is ready to burn into ROM
This program comes with all 8051 assemblers Recent Windows-based assemblers combine step 2 through 4 into one step

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ASSEMBLING AND RUNNING AN 8051 PROGRAM myfile.lst EDITOR PROGRAM myfile.asm ASSEMBLER PROGRAM myfile.obj Other obj files

Steps to Create a Program

LINKER PROGRAM myfile.abs OH PROGRAM myfile.hex HANEL

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14

ASSEMBLING AND RUNNING AN 8051 PROGRAM lst File
1 2 3 4 5

The lst (list) file, which is optional, is very useful to the programmer
It lists all the opcodes and addresses as well as errors that the assembler detected The programmer uses the lst file to find the syntax errors or debug
0000 0000 0002 0004 0006 7D25 7F34 7400 2D 2F 2412 ORG MOV MOV MOV ADD ADD ADD 0H R5,#25H R7,#34H A,#0 A,R5 ;start (origin) at 0 ;load 25H into R5 ;load 34H into R7 ;load 0 into A ;add contents of R5 to A ;now A = A + R5 A,R7 ;add contents of R7 to A ;now A = A + R7 A,#12H ;add to A value 12H ;now A = A + 12H SJMP HERE;stay in this loop ;end of asm source file

6 0007 7 0008 8 000A 9 000C

80EF HERE: END

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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

address

15

PROGRAM COUNTER AND ROM SPACE Program Counter

The program counter points to the address of the next instruction to be executed
As the CPU fetches the opcode from the program ROM, the program counter is increasing to point to the next instruction

The program counter is 16 bits wide
This means that it can access program addresses 0000 to FFFFH, a total of 64K bytes of code

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16

PROGRAM COUNTER AND ROM SPACE Power up

All 8051 members start at memory address 0000 when they’re powered up
Program Counter has the value of 0000 The first opcode is burned into ROM address 0000H, since this is where the 8051 looks for the first instruction when it is booted We achieve this by the ORG statement in the source program

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17

PROGRAM COUNTER AND ROM SPACE Placing Code in ROM

Examine the list file and how the code is placed in ROM
1 2 3 4 5 0000 0000 0002 0004 0006 7D25 7F34 7400 2D 2F 2412 80EF ORG MOV MOV MOV ADD 0H R5,#25H R7,#34H A,#0 A,R5 ;start (origin) at 0 ;load 25H into R5 ;load 34H into R7 ;load 0 into A ;add contents of R5 to A ;now A = A + R5 ;add contents of R7 to A ;now A = A + R7 ;add to A value 12H ;now A = A + 12H ;stay in this loop ;end of asm source file Assembly Language MOV R5, #25H MOV R7, #34H MOV A, #0 ADD A, R5 ADD A, R7 ADD A, #12H HERE: SJMP HERE

6 0007 7 0008 8 000A 9 000C

ADD A,R7 ADD A,#12H HERE: SJMP HERE END

ROM Address 0000 0002 0004 0006 0007 0008 000A

Machine Language 7D25 7F34 7400 2D 2F 2412 80EF

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18

PROGRAM COUNTER AND ROM SPACE Placing Code in ROM
(cont’)

After the program is burned into ROM, the opcode and operand are placed in ROM memory location starting at 0000
ROM contents
Address
0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B

Code
7D 25 7F 34 74 00 2D 2F 24 12 80 FE

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19

PROGRAM COUNTER AND ROM SPACE Executing Program

A step-by-step description of the action of the 8051 upon applying power on it
1.

When 8051 is powered up, the PC has 0000 and starts to fetch the first opcode from location 0000 of program ROM
Upon executing the opcode 7D, the CPU fetches the value 25 and places it in R5 Now one instruction is finished, and then the PC is incremented to point to 0002, containing opcode 7F

2.

Upon executing the opcode 7F, the value 34H is moved into R7
The PC is incremented to 0004

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20

PROGRAM COUNTER AND ROM SPACE Executing Program
(cont’)

(cont’)
3. 4. 5.

The instruction at location 0004 is executed and now PC = 0006 After the execution of the 1-byte instruction at location 0006, PC = 0007 Upon execution of this 1-byte instruction at 0007, PC is incremented to 0008
This process goes on until all the instructions are fetched and executed The fact that program counter points at the next instruction to be executed explains some microprocessors call it the instruction pointer

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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

21

PROGRAM COUNTER AND ROM SPACE ROM Memory Map in 8051 Family

No member of 8051 family can access more than 64K bytes of opcode
The program counter is a 16-bit register
Byte 0000 0000 Byte 0000 Byte

0FFF 8751 AT89C51 3FFF DS89C420/30 7FFF DS5000-32

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22

8051 DATA TYPES AND DIRECTIVES Data Type

8051 microcontroller has only one data type - 8 bits
The size of each register is also 8 bits It is the job of the programmer to break down data larger than 8 bits (00 to FFH, or 0 to 255 in decimal) The data types can be positive or negative

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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

23

8051 DATA TYPES AND DIRECTIVES Assembler Directives

The DB directive is the most widely used data directive in the assembler
It is used to define the 8-bit data When DB is used to define data, the numbers can be in decimal, binary, hex, The “D” after the decimal ASCII formats number is optional, but using
DATA1: DATA2: DATA3: ORG DB DB DB ORG DB ORG DB “B” (binary) and “H” (hexadecimal) for the others is 500H required 28 ;DECIMAL (1C in Hex) 00110101B ;BINARY (35 in Hex) 39H ;HEX 510H Place ASCII in quotation marks The;ASCII NUMBERS ASCII Assembler will assign “2591” code for the numbers or characters 518H “My name is Joe” ;ASCII CHARACTERS

The Assembler will convert the numbers DATA4: into hex DATA6:

Define ASCII strings larger than two characters HANEL

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24

8051 DATA TYPES AND DIRECTIVES Assembler Directives
(cont’)

ORG (origin)
The ORG directive is used to indicate the beginning of the address The number that comes after ORG can be either in hex and decimal
If the number is not followed by H, it is decimal and the assembler will convert it to hex

END
This indicates to the assembler the end of the source (asm) file The END directive is the last line of an 8051 program
Mean that in the code anything after the END directive is ignored by the assembler

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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

25

8051 DATA TYPES AND DIRECTIVES Assembler directives
(cont’)

EQU (equate)
This is used to define a constant without occupying a memory location The EQU directive does not set aside storage for a data item but associates a constant value with a data label
When the label appears in the program, its constant value will be substituted for the label

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8051 DATA TYPES AND DIRECTIVES Assembler directives
(cont’)

EQU (equate)

(cont’)

Assume that there is a constant used in many different places in the program, and the programmer wants to change its value throughout
By the use of EQU, one can change it once and the assembler will change all of its occurrences
Use EQU for the counter constant COUNT ... MOV EQU 25 .... R3, #COUNT The constant is used to load the R3 register

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27

FLAG BITS AND PSW REGISTER Program Status Word

The program status word (PSW) register, also referred to as the flag register, is an 8 bit register
Only 6 bits are used
These four are CY (carry), AC (auxiliary carry), P (parity), and OV (overflow) – They are called conditional flags, meaning that they indicate some conditions that resulted after an instruction was executed The PSW3 and PSW4 are designed as RS0 and RS1, and are used to change the bank

The two unused bits are user-definable

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28

FLAG BITS AND PSW REGISTER Program Status Word (cont’)
The result of signed number operation is too large, causing the high-order bit to overflow into the sign bit

CY
CY AC -RS1 RS0 OV -P

AC

F0

RS1 RS0

OV

--

P

PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0

A carry from D3 to D4 Carry flag. Auxiliary carry flag. Carry out from the d7 bit Available to the user for general purpose Register Bank selector bit 1. Register Bank selector bit 0. Overflow flag. Reflect the number of 1s User definable bit. in register A Parity flag. Set/cleared by hardware each instruction cycle to indicate an odd/even number of 1 bits in the accumulator.
RS0 0 1 0 1 Register Bank 0 1 2 3 Address 00H – 07H 08H – 0FH 10H – 17H 18H – 1FH

RS1 0 0 1 1

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29

FLAG BITS AND PSW REGISTER ADD Instruction And PSW

Instructions that affect flag bits
Instruction ADD ADDC SUBB MUL DIV DA RPC PLC SETB C CLR C CPL C ANL C, bit ANL C, /bit ORL C, bit ORL C, /bit MOV C, bit CJNE CY X X X 0 0 X X X 1 0 X X X X X X X OV X X X X X AC X X X

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30

FLAG BITS AND PSW REGISTER ADD Instruction And PSW
(cont’)

The flag bits affected by the ADD instruction are CY, P, AC, and OV
Example 2-2 Show the status of the CY, AC and P flag after the addition of 38H and 2FH in the following instructions. MOV A, #38H ADD A, #2FH ;after the addition A=67H, CY=0 Solution: 38 + 2F 67 00111000 00101111 01100111

CY = 0 since there is no carry beyond the D7 bit AC = 1 since there is a carry from the D3 to the D4 bi P = 1 since the accumulator has an odd number of 1s (it has five 1s) HANEL
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31

FLAG BITS AND PSW REGISTER ADD Instruction And PSW
(cont’)

Example 2-3 Show the status of the CY, AC and P flag after the addition of 9CH and 64H in the following instructions. MOV A, #9CH ADD A, #64H Solution: 9C + 64 100 10011100 01100100 00000000 ;after the addition A=00H, CY=1

CY = 1 since there is a carry beyond the D7 bit AC = 1 since there is a carry from the D3 to the D4 bi P = 0 since the accumulator has an even number of 1s (it has zero 1s)

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32

FLAG BITS AND PSW REGISTER ADD Instruction And PSW
(cont’)

Example 2-4 Show the status of the CY, AC and P flag after the addition of 88H and 93H in the following instructions. MOV A, #88H ADD A, #93H Solution: 88 + 93 11B 10001000 10010011 00011011 ;after the addition A=1BH, CY=1

CY = 1 since there is a carry beyond the D7 bit AC = 0 since there is no carry from the D3 to the D4 bi P = 0 since the accumulator has an even number of 1s (it has four 1s)

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33

REGISTER BANKS AND STACK RAM Memory Space Allocation

There are 128 bytes of RAM in the 8051
Assigned addresses 00 to 7FH

The 128 bytes are divided into three different groups as follows:
1)

2)

3)

A total of 32 bytes from locations 00 to 1F hex are set aside for register banks and the stack A total of 16 bytes from locations 20H to 2FH are set aside for bit-addressable read/write memory A total of 80 bytes from locations 30H to 7FH are used for read and write storage, called scratch pad

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34

RAM Allocation in 8051

8051 REGISTER BANKS AND STACK RAM Memory Space Allocation
(cont’)

7F Scratch pad RAM 30 2F Bit-Addressable RAM 20 1F Register Bank 3 18 17 10 0F 08 07 Register Bank 0 00 Register Bank 2 Register Bank 1 (stack)

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35

8051 REGISTER BANKS AND STACK Register Banks

These 32 bytes are divided into 4 banks of registers in which each bank has 8 registers, R0-R7
RAM location from 0 to 7 are set aside for bank 0 of R0-R7 where R0 is RAM location 0, R1 is RAM location 1, R2 is RAM location 2, and so on, until memory location 7 which belongs to R7 of bank 0 It is much easier to refer to these RAM locations with names such as R0, R1, and so on, than by their memory locations

Register bank 0 is the default when 8051 is powered up
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36

8051 REGISTER BANKS AND STACK Register Banks
(cont’)

Register banks and their RAM address
Bank 0 7 6 5 4 3 2 1 0
R7 R6 R5 R4 R3 R2 R1 R0

Bank 1 F E D C B A 9 8
R7 R6 R5 R4 R3 R2 R1 R0

Bank 2 17 16 15 14 13 12 11 10
R7 R6 R5 R4 R3 R2 R1 R0

Bank 3 1F 1E 1D 1C 1B 1A 19 18
R7 R6 R5 R4 R3 R2 R1 R0

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37

8051 REGISTER BANKS AND STACK Register Banks
(cont’)

We can switch to other banks by use of the PSW register
Bits D4 and D3 of the PSW are used to select the desired register bank Use the bit-addressable instructions SETB and CLR to access PSW.4 and PSW.3
PSW bank selection
Bank 0 Bank 1 Bank 2 Bank 3
RS1(PSW.4) RS0(PSW.3)

0 0 1 1

0 1 0 1

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38

8051 REGISTER BANKS AND STACK Register Banks
(cont’)

Example 2-5 MOV R0, #99H MOV R1, #85H ;load R0 with 99H ;load R1 with 85H

Example 2-6 MOV 00, #99H MOV 01, #85H ;RAM location 00H has 99H ;RAM location 01H has 85H

Example 2-7 SETB PSW.4 MOV R0, #99H MOV R1, #85H ;select bank 2 ;RAM location 10H has 99H ;RAM location 11H has 85H

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39

8051 REGISTER BANKS AND STACK Stack

The stack is a section of RAM used by the CPU to store information temporarily
This information could be data or an address

The register used to access the stack is called the SP (stack pointer) register
The stack pointer in the 8051 is only 8 bit wide, which means that it can take value of 00 to FFH When the 8051 is powered up, the SP register contains value 07
RAM location 08 is the first location begin used for the stack by the 8051

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40

8051 REGISTER BANKS AND STACK
(cont’)

The storing of a CPU register in the stack is called a PUSH
SP is pointing to the last used location of the stack As we push data onto the stack, the SP is incremented by one
This is different from many microprocessors

Stack

Loading the contents of the stack back into a CPU register is called a POP
With every pop, the top byte of the stack is copied to the register specified by the instruction and the stack pointer is decremented once
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41

8051 REGISTER BANKS AND STACK Pushing onto Stack

Example 2-8 Show the stack and stack pointer from the following. Assume the default stack area.
MOV R6, #25H MOV R1, #12H MOV R4, #0F3H PUSH 6 PUSH 1 PUSH 4 Solution: After PUSH 6 0B 0A 09 08 Start SP = 07 0B 0A 09 08 25 SP = 08 After PUSH 1 0B 0A 09 08 12 25 After PUSH 4 0B 0A 09 08 F3 12 25

SP = 09

SP = 0A

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42

8051 REGISTER BANKS AND STACK Popping From Stack

Example 2-9 Examining the stack, show the contents of the register and SP after execution of the following instructions. All value are in hex.
POP POP POP Solution: After POP 3 0B 0A 09 08 54 F9 76 6C 0B 0A 09 08 F9 76 6C After POP 5 0B 0A 09 08 76 6C After POP 2 0B 0A 09 08 6C SP = 08 3 5 2 ; POP stack into R3 ; POP stack into R5 ; POP stack into R2

Start SP = 0B

SP = 0A

SP = 09

Because locations 20-2FH of RAM are reserved for bit-addressable memory, so we can change the SP to other RAM location by using the instruction “MOV SP, #XX” HANEL
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43

8051 REGISTER BANKS AND STACK CALL Instruction And Stack

The CPU also uses the stack to save the address of the instruction just below the CALL instruction
This is how the CPU knows where to resume when it returns from the called subroutine

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44

8051 REGISTER BANKS AND STACK Incrementing Stack Pointer

The reason of incrementing SP after push is
Make sure that the stack is growing toward RAM location 7FH, from lower to upper addresses Ensure that the stack will not reach the bottom of RAM and consequently run out of stack space If the stack pointer were decremented after push
We would be using RAM locations 7, 6, 5, etc. which belong to R7 to R0 of bank 0, the default register bank

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45

8051 REGISTER BANKS AND STACK Stack and Bank 1 Conflict

When 8051 is powered up, register bank 1 and the stack are using the same memory space
We can reallocate another section of RAM to the stack

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46

8051 REGISTER BANKS AND STACK Stack And Bank 1 Conflict
(cont’)

Example 2-10 Examining the stack, show the contents of the register and SP after execution of the following instructions. All value are in hex.
MOV SP, #5FH MOV R2, #25H MOV R1, #12H MOV R4, #0F3H PUSH 2 PUSH 1 PUSH 4 Solution: After PUSH 2 63 62 61 60 Start SP = 5F 63 62 61 60 25 SP = 60 After PUSH 1 63 62 61 60 12 25 After PUSH 4 63 62 61 60 F3 12 25 ;make RAM location 60H ;first stack location

SP = 61

SP = 62

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47

JUMP, LOOP AND CALL INSTRUCTIONS
The 8051 Microcontroller and Embedded Systems: Using Assembly and C
Mazidi, Mazidi and McKinlay

Chung-Ping Young 楊中平
Home Automation, Networking, and Entertainment Lab

Dept. of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

LOOP AND JUMP INSTRUCTIONS Looping

Repeating a sequence of instructions a certain number of times is called a

loop

Loop action is performed by DJNZ reg, Label
The register is decremented If it is not zero, it jumps to the target address referred to by the label Prior to the start of loop the register is loaded with the counter for the number of repetitions Counter can be R0 – R7 or RAM location

A loop can be repeated a maximum of 255 times, if R2 is FFH

;This program adds value 3 to the ACC ten times MOV A,#0 ;A=0, clear ACC MOV R2,#10 ;load counter R2=10 AGAIN: ADD A,#03 ;add 03 to ACC DJNZ R2,AGAIN ;repeat until R2=0,10 times MOV R5,A ;save A in R5 HANEL
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LOOP AND JUMP INSTRUCTIONS Nested Loop

If we want to repeat an action more times than 256, we use a loop inside a loop, which is called nested loop
We use multiple registers to hold the count
Write a program to (a) load the accumulator with the value 55H, and (b) complement the ACC 700 times MOV MOV NEXT: MOV AGAIN: CPL DJNZ DJNZ A,#55H ;A=55H R3,#10 ;R3=10, outer loop count R2,#70 ;R2=70, inner loop count A ;complement A register R2,AGAIN ;repeat it 70 times R3,NEXT

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LOOP AND JZ label JUMP MOV INSTRUCTIONS JZ Conditional Jumps

Jump only if a certain condition is met
;jump if A=0
A,R0 OVER A,R1 OVER ;A=R0 ;jump if A = 0 ;A=R1 ;jump if A = 0 Can be used only for register A, not any other register

MOV JZ ... OVER:

Determine if R5 contains the value 0. If so, put 55H in it. MOV JNZ MOV ... A,R5 ;copy R5 to A NEXT ;jump if A is not zero R5,#55H

NEXT:

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4

LOOP AND JUMP INSTRUCTIONS Conditional Jumps
(cont’)

(cont’) JNC label

;jump if no carry, CY=0

If CY = 0, the CPU starts to fetch and execute instruction from the address of the label If CY = 1, it will not jump but will execute the next instruction below JNC
Find the sum of the values 79H, F5H, E2H. Put the sum in registers R0 (low byte) and R5 (high byte). MOV R5,#0 MOV A,#0 ;A=0 MOV R5,A ;clear R5 ADD A,#79H ;A=0+79H=79H ; JNC N_1 ;if CY=0, add next number ; INC R5 ;if CY=1, increment R5 N_1: ADD A,#0F5H ;A=79+F5=6E and CY=1 JNC N_2 ;jump if CY=0 INC R5 ;if CY=1,increment R5 (R5=1) N_2: ADD A,#0E2H ;A=6E+E2=50 and CY=1 JNC OVER ;jump if CY=0 INC R5 ;if CY=1, increment 5 OVER: MOV R0,A ;now R0=50H, and R5=02
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8051 conditional jump instructions

LOOP AND JUMP INSTRUCTIONS Conditional Jumps
(cont’)

Instructions JZ JNZ DJNZ CJNE A,byte CJNE reg,#data JC JNC JB JNB JBC

Actions Jump if A = 0 Jump if A ≠ 0 Decrement and Jump if A ≠ 0 Jump if A ≠ byte Jump if byte ≠ #data Jump if CY = 1 Jump if CY = 0 Jump if bit = 1 Jump if bit = 0 Jump if bit = 1 and clear bit

All conditional jumps are short jumps
The address of the target must within -128 to +127 bytes of the contents of PC
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The unconditional jump is a jump in LOOP AND which control is transferred JUMP unconditionally to the target location INSTRUCTIONS LJMP (long jump)
Unconditional Jumps 3-byte instruction
First byte is the opcode Second and third bytes represent the 16-bit target address – Any memory location from 0000 to FFFFH SJMP

(short jump)
2-byte instruction
First byte is the opcode Second byte is the relative target address – 00 to FFH (forward +127 and backward -128 bytes from the current PC)

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7

LOOP AND JUMP INSTRUCTIONS Calculating Short Jump Address

To calculate the target address of a short jump (SJMP, JNC, JZ, DJNZ, etc.)
The second byte is added to the PC of the instruction immediately below the jump

If the target address is more than -128 to +127 bytes from the address below the short jump instruction
The assembler will generate an error stating the jump is out of range

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8

LOOP AND JUMP INSTRUCTIONS Calculating Short Jump Address
(cont’)

Line
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18

PC
0000 0000 0002 0004 0006 0007 0008 0009 000B 000D 000E 000F 0010 0011 0012 0013 0015 0017

Opcode
7800 7455 6003 08 04 + 04 2477 5005 E4 F8 + F9 FA FB 2B 50F2 80FE

Mnemonic Operand
ORG MOV MOV JZ INC INC INC ADD JNC CLR MOV MOV MOV MOV ADD JNC SJMP END 0000 R0,#0 A,#55H NEXT R0 A A A,#77H OVER A R0,A R1,A R2,A R3,A A,R3 AGAIN HERE

AGAIN: NEXT:

OVER:

+

HERE:

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9

CALL INSTRUCTIONS

Call instruction is used to call subroutine
Subroutines are often used to perform tasks that need to be performed frequently This makes a program more structured in addition to saving memory space
LCALL

(long call)
First byte is the opcode Second and third bytes are used for address of target subroutine – Subroutine is located anywhere within 64K byte address space

3-byte instruction

ACALL

(absolute call)
11 bits are used for address within 2K-byte range

2-byte instruction
Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

HANEL

10

CALL INSTRUCTIONS LCALL

When a subroutine is called, control is transferred to that subroutine, the processor
Saves on the stack the the address of the instruction immediately below the LCALL Begins to fetch instructions form the new location

After finishing execution of the subroutine
The instruction RET transfers control back to the caller
Every subroutine needs RET as the last instruction
Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

HANEL

11

CALL INSTRUCTIONS LCALL
(cont’)

BACK:

ORG MOV MOV LCALL MOV MOV LCALL SJMP

0 A,#55H P1,A DELAY A,#0AAH P1,A DELAY BACK

;load ;send ;time ;load ;send

A with 55H to delay A with AAH to

55H port 1 AA (in hex) port 1

;keep doing this indefinitely

The counter R5 is set to FFH; so loop is repeated 255 times.

Upon executing “LCALL DELAY”, the address of instruction below it, “MOV A,#0AAH” is pushed onto stack, and the 8051 starts to execute at 300H.

;---------- this is delay subroutine -----------ORG 300H ;put DELAY at address 300H DELAY: MOV R5,#0FFH ;R5=255 (FF in hex), counter AGAIN: DJNZ R5,AGAIN ;stay here until R5 become 0 RET ;return to caller (when R5 =0) END ;end of asm file

The amount of time delay depends on the frequency of the 8051 HANEL

When R5 becomes 0, control falls to the RET which pops the address from the stack into the PC and resumes executing the instructions after the CALL.
12

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

CALL INSTRUCTIONS CALL Instruction and Stack

001 002 003 004 005 006 007 008 009 010 011 012 013 014 015 016

0000 0000 0002 0004 0007 0009 000B 000E 0010 0010 0300 0300 0300 0302 0304 0305

7455 BACK: F590 120300 74AA F590 120300 80F0

ORG 0 MOV A,#55H MOV P1,A LCALL DELAY MOV A,#0AAH MOV P1,A LCALL DELAY SJMP BACK

;load ;send ;time ;load ;send

A with 55H to delay A with AAH to

55H p1 AAH p1

;keep doing this

;-------this is the delay subroutine-----ORG 300H DELAY: 7DFF MOV R5,#0FFH ;R5=255 DDFE AGAIN: DJNZ R5,AGAIN ;stay here RET ;return to caller 22 END ;end of asm file

Stack frame after the first LCALL
0A 09 08 00 07

Low byte goes first and high byte is last

SP = 09

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

13

CALL INSTRUCTIONS Use PUSH/POP in Subroutine

01 02 03 04 05 06 07 08 09 10

11 12 13 14 15 Normally, the number of PUSH 16 17 and POP instructions must 18 19 always match in any 20 called subroutine 21 22

0000 0000 0002 0004 0006 0008 000B 000D 000F 0012 this 0014 0300 0300 0302 0304 0306 0308 030A 030C 030E 0310 0311

7455 BACK: F590 7C99 7D67 120300 74AA F590 120300 80EC

ORG 0 MOV A,#55H MOV P1,A MOV R4,#99H MOV R5,#67H LCALL DELAY MOV A,#0AAH MOV P1,A LCALL DELAY SJMP BACK

;load A with 55H ;send 55H to p1 ;time delay ;load A with AA ;send AAH to p1 ;keeping doing

;-------this is the delay subroutine-----ORG 300H C004 DELAY: PUSH 4 ;push R4 C005 PUSH 5 ;push R5 7CFF MOV R4,#0FFH;R4=FFH 7DFF NEXT: MOV R5,#0FFH;R5=FFH DDFE AGAIN: DJNZ R5,AGAIN DCFA DJNZ R4,NEXT D005 POP 5 ;POP into R5 D004 POP 4 ;POP into R4 22 RET ;return to caller END PUSH 4 ;end of asm file After first LCALL After After PUSH 5 0B 0A 0B 0A 99 R4 0B 0A 67 99 R5 R4

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09 00 PCH 09 00 PCH 09 00 PCH Department of Computer Science and Information Engineering 08 0B PCL 08 0B PCL 08 0B PCL National Cheng Kung University, TAIWAN

14

CALL INSTRUCTIONS Calling Subroutines

;MAIN program calling subroutines ORG 0 It is common to have one MAIN: LCALL SUBR_1 main program and many LCALL SUBR_2 subroutines that are called LCALL SUBR_3

from the main program
HERE: SJMP HERE ;-----------end of MAIN SUBR_1: ... ... RET ;-----------end of subroutine1 SUBR_2: ... ... RET ;-----------end of subroutine2

SUBR_3: ... ... RET ;-----------end of subroutine3 END ;end of the asm file

This allows you to make each subroutine into a separate module - Each module can be tested separately and then brought together with main program - In a large program, the module can be assigned to different programmers

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

15

CALL INSTRUCTIONS ACALL

The only difference between ACALL and LCALL is
The target address for LCALL can be anywhere within the 64K byte address The target address of ACALL must be within a 2K-byte range

The use of ACALL instead of LCALL can save a number of bytes of program ROM space

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

16

CALL INSTRUCTIONS ACALL
(cont’)

BACK:

ORG MOV MOV LCALL MOV MOV LCALL SJMP ... END

0 A,#55H P1,A DELAY A,#0AAH P1,A DELAY BACK

;load ;send ;time ;load ;send

A with 55H to delay A with AAH to

55H port 1 AA (in hex) port 1

;keep doing this indefinitely ;end of asm file

A rewritten program which is more efficiently
ORG MOV MOV ACALL CPL SJMP ... END 0 A,#55H P1,A DELAY A BACK ;load A with 55H ;send 55H to port 1 ;time delay ;complement reg A ;keep doing this indefinitely ;end of asm file

BACK:

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

17

TIME DELAY FOR VARIOUS 8051 CHIPS

CPU executing an instruction takes a certain number of clock cycles
These are referred as to as machine cycles

The length of machine cycle depends on the frequency of the crystal oscillator connected to 8051 In original 8051, one machine cycle lasts 12 oscillator periods
Find the period of the machine cycle for 11.0592 MHz crystal frequency
Solution:

11.0592/12 = 921.6 kHz; machine cycle is 1/921.6 kHz = 1.085μs
Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

HANEL

18

TIME DELAY FOR VARIOUS 8051 CHIPS
(cont’)

For 8051 system of 11.0592 MHz, find how long it takes to execute each instruction. (a) MOV R3,#55 (b) DEC R3 (c) DJNZ R2 target (d) LJMP (e) SJMP (f) NOP (g) MUL AB Solution: Machine cycles (a) 1 (b) 1 (c) 2 (d) 2 (e) 2 (f) 1 (g) 4

Time to execute 1x1.085μs = 1.085μs 1x1.085μs = 1.085μs 2x1.085μs = 2.17μs 2x1.085μs = 2.17μs 2x1.085μs = 2.17μs 1x1.085μs = 1.085μs 4x1.085μs = 4.34μs

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

19

TIME DELAY FOR VARIOUS 8051 CHIPS Delay Calculation

Find the size of the delay in following program, if the crystal frequency is 11.0592MHz. MOV A,#55H AGAIN: MOV P1,A ACALL DELAY CPL A SJMP AGAIN ;---time delay------DELAY: MOV R3,#200 HERE: DJNZ R3,HERE RET Solution: Machine cycle DELAY: MOV R3,#200 1 HERE: DJNZ R3,HERE 2 RET 2 Therefore, [(200x2)+1+2]x1.085μs = 436.255μs.

A simple way to short jump to itself in order to keep the microcontroller busy HERE: SJMP HERE We can use the following: SJMP $

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

20

TIME DELAY FOR VARIOUS 8051 CHIPS Increasing Delay Using NOP

Find the size of the delay in following program, if the crystal frequency is 11.0592MHz. Machine Cycle DELAY: MOV R3,#250 1 HERE: NOP 1 NOP 1 NOP 1 NOP 1 DJNZ R3,HERE 2 RET 2 Solution: The time delay inside HERE loop is [250(1+1+1+1+2)]x1.085μs = 1627.5μs. Adding the two instructions outside loop we have 1627.5μs + 3 x 1.085μs = 1630.755μs

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

21

TIME DELAY FOR VARIOUS 8051 CHIPS Large Delay Using Nested Loop

Find the size of the delay in following program, if the crystal frequency is 11.0592MHz. Machine Cycle DELAY: MOV R2,#200 1 Notice in nested loop, AGAIN: MOV R3,#250 1 as in all other time HERE: NOP 1 delay loops, the time NOP 1 is approximate since DJNZ R3,HERE 2 we have ignored the DJNZ R2,AGAIN 2 first and last RET 2 instructions in the subroutine. Solution: For HERE loop, we have (4x250)x1.085μs=1085μs. For AGAIN loop repeats HERE loop 200 times, so we have 200x1085μs=217000μs. But “MOV R3,#250” and “DJNZ R2,AGAIN” at the start and end of the AGAIN loop add (3x200x1.805)=651μs. As a result we have 217000+651=217651μs.

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

22

TIME DELAY FOR VARIOUS 8051 CHIPS Delay Calculation for Other 8051

Two factors can affect the accuracy of the delay
Crystal frequency
The duration of the clock period of the machine cycle is a function of this crystal frequency

8051 design
The original machine cycle duration was set at 12 clocks Advances in both IC technology and CPU design in recent years have made the 1-clock machine cycle a common feature
Clocks per machine cycle for various 8051 versions
Chip/Maker AT89C51 Atmel P89C54X2 Philips DS5000 Dallas Semi DS89C420/30/40/50 Dallas Semi Clocks per Machine Cycle 12 6 4 1
23

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

TIME DELAY FOR VARIOUS 8051 CHIPS Delay Calculation for Other 8051
(cont’)

Find the period of the machine cycle (MC) for various versions of 8051, if XTAL=11.0592 MHz. (a) AT89C51 (b) P89C54X2 (c) DS5000 (d) DS89C4x0 Solution: (a) 11.0592MHz/12 = 921.6kHz; MC is 1/921.6kHz = 1.085μs = 1085ns (b) 11.0592MHz/6 = 1.8432MHz; MC is 1/1.8432MHz = 0.5425μs = 542ns (c) 11.0592MHz/4 = 2.7648MHz ; MC is 1/2.7648MHz = 0.36μs = 360ns (d) 11.0592MHz/1 = 11.0592MHz; MC is 1/11.0592MHz = 0.0904μs = 90ns

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

24

TIME DELAY FOR VARIOUS 8051 CHIPS Delay Calculation for Other 8051
(cont’)

Instruction MOV R3,#55 DEC R3 DJNZ R2 target LJMP SJMP NOP MUL AB

8051 1 1 2 2 2 1 4

DSC89C4x0 2 1 4 3 3 1 9

For an AT8051 and DSC89C4x0 system of 11.0592 MHz, find how long it takes to execute each instruction. (a) MOV R3,#55 (b) DEC R3 (c) DJNZ R2 target (d) LJMP (e) SJMP (f) NOP (g) MUL AB Solution: AT8051 (a) 1 1085ns = (b) 1 1085ns = (c) 2 1085ns = (d) 2 1085ns = (e) 2 1085ns = (f) 1 1085ns = (g) 4 1085ns = DS89C4x0 90ns = 180ns 90ns = 90ns 90ns = 360ns 90ns = 270ns 90ns = 270ns 90ns = 90ns 90ns = 810ns
25

1085ns 1085ns 2170ns 2170ns 2170ns 1085ns 4340ns

2 1 4 3 3 1 9

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

I/O PORT PROGRAMMING
The 8051 Microcontroller and Embedded Systems: Using Assembly and C
Mazidi, Mazidi and McKinlay

Chung-Ping Young 楊中平
Home Automation, Networking, and Entertainment Lab

Dept. of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

I/O PROGRAMMING
A total of 32 pins are set aside for the four ports P0, P1, P2, P3, where each port takes 8 pins

8051 Pin Diagram
P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD) P3.0 (TXD) P3.1 (-INT0) P3.2 (-INT1) P3.3 (T0) P3.4 (T1) P3.5 (-WR) P3.6 (-RD )P3.7 XTAL2 XTAL1 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

Provides +5V supply voltage to the chip
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 Vcc P0.0 (AD0) P0.1 (AD1) P0.2 (AD2) P0.3 (AD3) P0.4 (AD4) P0.5 (AD5) P0.6 (AD6) P0.7 (AD7) -EA/VPP ALE/PROG -PSEN P2.7 (A15) P2.6 (A14) P2.5 (A13) P2.4 (A12) P2.3 (A11) P2.2 (A10) P2.1 (A9) P2.0 (A8)

P1

P0

8051 (8031) (89420)

P3

P2

Grond

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

2

I/O PROGRAMMING I/O Port Pins

The four 8-bit I/O ports P0, P1, P2 and P3 each uses 8 pins All the ports upon RESET are configured as input, ready to be used as input ports
When the first 0 is written to a port, it becomes an output To reconfigure it as an input, a 1 must be sent to the port
To use any of these ports as an input port, it must be programmed

P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD)P3.0 (TXD)P3.1 (INT0)P3.2 (INT1)P3.3 (T0)P3.4 (T1)P3.5 (WR)P3.6 (RD)P3.7 XTAL2 XTAL1 GND

40 1 39 2 38 3 37 4 36 5 35 6 34 7 33 8 32 9 8051 31 10 11(8031)30 29 12 28 13 27 14 26 15 25 16 24 17 23 18 22 19 21 20

Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) -EA/VPP ALE/PROG -PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8)

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

3

I/O PROGRAMMING Port 0

It can be used for input or output, each pin must be connected externally to a 10K ohm pull-up resistor
This is due to the fact that P0 is an open drain, unlike P1, P2, and P3 same way that open collector is used for TTL chips
Vcc

Open drain is a term used for MOS chips in the

P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD)P3.0 (TXD)P3.1 (INT0)P3.2 (INT1)P3.3 (T0)P3.4 (T1)P3.5 (WR)P3.6 (RD)P3.7 XTAL2 XTAL1 GND

40 1 39 2 38 3 37 4 36 5 35 6 34 7 33 8 32 9 8051 31 10 11(8031)30 29 12 28 13 27 14 26 15 25 16 24 17 23 18 22 19 21 20

Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) -EA/VPP ALE/PROG -PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8)

P0.X
8051

10 K
P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

Port 0
4

I/O PROGRAMMING Port 0
(cont’)

The following code will continuously send out to port 0 the alternating value 55H and AAH BACK: MOV MOV ACALL MOV MOV ACALL SJMP A,#55H P0,A DELAY A,#0AAH P0,A DELAY BACK

P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD)P3.0 (TXD)P3.1 (INT0)P3.2 (INT1)P3.3 (T0)P3.4 (T1)P3.5 (WR)P3.6 (RD)P3.7 XTAL2 XTAL1 GND

40 1 39 2 38 3 37 4 36 5 35 6 34 7 33 8 32 9 8051 31 10 11(8031)30 29 12 28 13 27 14 26 15 25 16 24 17 23 18 22 19 21 20

Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) -EA/VPP ALE/PROG -PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8)

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

5

I/O PROGRAMMING Port 0 as Input

In order to make port 0 an input, the port must be programmed by writing 1 to all the bits
Port 0 is configured first as an input port by writing 1s to it, and then data is received from that port and sent to P1 MOV MOV BACK: A,#0FFH P0,A A,P0 P1,A BACK ;A=FF hex ;make P0 an i/p port ;by writing it all 1s ;get data from P0 ;send it to port 1 ;keep doing it

P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD)P3.0 (TXD)P3.1 (INT0)P3.2 (INT1)P3.3 (T0)P3.4 (T1)P3.5 (WR)P3.6 (RD)P3.7 XTAL2 XTAL1 GND

40 1 39 2 38 3 37 4 36 5 35 6 34 7 33 8 32 9 8051 31 10 11(8031)30 29 12 28 13 27 14 26 15 25 16 24 17 23 18 22 19 21 20

Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) -EA/VPP ALE/PROG -PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8)

MOV MOV SJMP

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

6

I/O PROGRAMMING Dual Role of Port 0

Port 0 is also designated as AD0-AD7, allowing it to be used for both address and data
When connecting an 8051/31 to an external memory, port 0 provides both address and data

P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD)P3.0 (TXD)P3.1 (INT0)P3.2 (INT1)P3.3 (T0)P3.4 (T1)P3.5 (WR)P3.6 (RD)P3.7 XTAL2 XTAL1 GND

40 1 39 2 38 3 37 4 36 5 35 6 34 7 33 8 32 9 8051 31 10 11(8031)30 29 12 28 13 27 14 26 15 25 16 24 17 23 18 22 19 21 20

Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) -EA/VPP ALE/PROG -PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8)

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

7

I/O PROGRAMMING Port 1

Port 1 can be used as input or output
In contrast to port 0, this port does not need any pull-up resistors since it already has pull-up resistors internally Upon reset, port 1 is configured as an input port
The following code will continuously send out to port 0 the alternating value 55H and AAH

P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD)P3.0 (TXD)P3.1 (INT0)P3.2 (INT1)P3.3 (T0)P3.4 (T1)P3.5 (WR)P3.6 (RD)P3.7 XTAL2 XTAL1 GND

40 1 39 2 38 3 37 4 36 5 35 6 34 7 33 8 32 9 8051 31 10 11(8031)30 29 12 28 13 27 14 26 15 25 16 24 17 23 18 22 19 21 20

Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) -EA/VPP ALE/PROG -PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8)

BACK:

MOV MOV ACALL CPL SJMP

A,#55H P1,A DELAY A BACK

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

8

I/O PROGRAMMING Port 1 as Input

To make port 1 an input port, it must be programmed as such by writing 1 to all its bits
Port 1 is configured first as an input port by writing 1s to it, then data is received from that port and saved in R7 and R5 MOV MOV MOV MOV ACALL MOV MOV A,#0FFH P1,A A,P1 R7,A DELAY A,P1 R5,A ;A=FF hex ;make P1 an input port ;by writing it all 1s ;get data from P1 ;save it to in reg R7 ;wait ;another data from P1 ;save it to in reg R5

P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD)P3.0 (TXD)P3.1 (INT0)P3.2 (INT1)P3.3 (T0)P3.4 (T1)P3.5 (WR)P3.6 (RD)P3.7 XTAL2 XTAL1 GND

40 1 39 2 38 3 37 4 36 5 35 6 34 7 33 8 32 9 8051 31 10 11(8031)30 29 12 28 13 27 14 26 15 25 16 24 17 23 18 22 19 21 20

Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) -EA/VPP ALE/PROG -PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8)

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

9

I/O PROGRAMMING Port 2

Port 2 can be used as input or output
Just like P1, port 2 does not need any pullup resistors since it already has pull-up resistors internally Upon reset, port 2 is configured as an input port

P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD)P3.0 (TXD)P3.1 (INT0)P3.2 (INT1)P3.3 (T0)P3.4 (T1)P3.5 (WR)P3.6 (RD)P3.7 XTAL2 XTAL1 GND

40 1 39 2 38 3 37 4 36 5 35 6 34 7 33 8 32 9 8051 31 10 11(8031)30 29 12 28 13 27 14 26 15 25 16 24 17 23 18 22 19 21 20

Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) -EA/VPP ALE/PROG -PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8)

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

10

I/O PROGRAMMING Port 2 as Input or Dual Role

P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD)P3.0 (TXD)P3.1 (INT0)P3.2 (INT1)P3.3 (T0)P3.4 (T1)P3.5 (WR)P3.6 (RD)P3.7 XTAL2 XTAL1 GND

40 1 39 2 38 3 37 4 36 5 35 6 34 7 33 8 32 9 8051 31 10 11(8031)30 29 12 28 13 27 14 26 15 25 16 24 17 23 18 22 19 21 20

Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) -EA/VPP ALE/PROG -PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8)

To make port 2 an input port, it must be programmed as such by writing 1 to all its bits In many 8051-based system, P2 is used as simple I/O In 8031-based systems, port 2 must be used along with P0 to provide the 16bit address for the external memory
Port 2 is also designated as A8 – A15, indicating its dual function Port 0 provides the lower 8 bits via A0 – A7

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

11

I/O PROGRAMMING Port 3

Port 3 can be used as input or output
Port 3 does not need any pull-up resistors Port 3 is configured as an input port upon reset, this is not the way it is most commonly used

P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD)P3.0 (TXD)P3.1 (INT0)P3.2 (INT1)P3.3 (T0)P3.4 (T1)P3.5 (WR)P3.6 (RD)P3.7 XTAL2 XTAL1 GND

40 1 39 2 38 3 37 4 36 5 35 6 34 7 33 8 32 9 8051 31 10 11(8031)30 29 12 28 13 27 14 26 15 25 16 24 17 23 18 22 19 21 20

Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) -EA/VPP ALE/PROG -PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8)

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

12

I/O PROGRAMMING Port 3
(cont’)

Port 3 has the additional function of providing some extremely important signals
P3 Bit P3.0 P3.1 P3.2 P3.3 Function RxD TxD INT0 INT1 T0 T1 WR RD Pin 10 11 12 13 14 15 16 17 In systems based on 8751, 89C51 or DS89C4x0, pins 3.6 and 3.7 are used for I/O while the rest of the pins in port 3 are normally used in the alternate function role
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13

Serial communications External interrupts Timers Read/Write signals of external memories

P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD)P3.0 (TXD)P3.1 (INT0)P3.2 (INT1)P3.3 (T0)P3.4 (T1)P3.5 (WR)P3.6 (RD)P3.7 XTAL2 XTAL1 GND

40 1 39 2 38 3 37 4 36 5 35 6 34 7 33 8 32 9 8051 31 10 11(8031)30 29 12 28 13 27 14 26 15 25 16 24 17 23 18 22 19 21 20

Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) -EA/VPP ALE/PROG -PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8)

P3.4 P3.5 P3.6 P3.7

HANEL

I/O PROGRAMMING Port 3
(cont’)

Write a program for the DS89C420 to toggle all the bits of P0, P1, and P2 every 1/4 of a second ORG BACK: MOV MOV MOV MOV ACALL MOV MOV MOV MOV ACALL SJMP QSDELAY: MOV H3: MOV H2: MOV H1: DJNZ DJNZ DJNZ RET END 0 A,#55H P0,A P1,A P2,A QSDELAY A,#0AAH P0,A P1,A P2,A QSDELAY BACK R5,#11 R4,#248 R3,#255 R3,H1 R4,H2 R5,H3

;Quarter of a second

P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD)P3.0 (TXD)P3.1 (INT0)P3.2 (INT1)P3.3 (T0)P3.4 (T1)P3.5 (WR)P3.6 (RD)P3.7 XTAL2 XTAL1 GND

40 1 39 2 38 3 37 4 36 5 35 6 34 7 33 8 32 9 8051 31 10 11(8031)30 29 12 28 13 27 14 26 15 25 16 24 17 23 18 22 19 21 20

Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) -EA/VPP ALE/PROG -PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8)

Delay = 11 × 248 × 255 × 4 MC × 90 ns = 250,430 µs ;4 MC for DS89C4x0

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

14

The entire 8 bits of Port 1 are accessed

I/O PROGRAMMING Different ways of Accessing Entire 8 Bits

BACK:

MOV MOV ACALL MOV MOV ACALL SJMP

A,#55H P1,A DELAY A,#0AAH P1,A DELAY BACK

Rewrite the code in a more efficient manner by accessing the port directly without going through the accumulator BACK: MOV ACALL MOV ACALL SJMP P1,#55H DELAY P1,#0AAH DELAY BACK

Another way of doing the same thing MOV A,#55H BACK: MOV P1,A ACALL DELAY CPL A SJMP BACK HANEL
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15

I/O BIT MANIPULATION PROGRAMMING I/O Ports and Bit Addressability

Sometimes we need to access only 1 or 2 bits of the port
BACK: CPL ACALL SJMP P1.2 DELAY BACK ;complement P1.2

;another variation of the above program AGAIN: SETB P1.2 ;set only P1.2 ACALL DELAY CLR P1.2 ;clear only P1.2 ACALL DELAY SJMP AGAIN P0 P1 P2 P3 Port Bit
P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7 D0 D1 D2 D3 D4 D5 D6 D7

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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

16

I/O BIT MANIPULATION PROGRAMMING I/O Ports and Bit Addressability
(cont’)

Example 4-2 Write the following programs. Create a square wave of 50% duty cycle on bit 0 of port 1. Solution: The 50% duty cycle means that the “on” and “off” state (or the high and low portion of the pulse) have the same length. Therefore, we toggle P1.0 with a time delay in between each state. HERE: SETB P1.0 ;set to high bit 0 of port 1 LCALL DELAY ;call the delay subroutine CLR P1.0 ;P1.0=0 LCALL DELAY SJMP HERE ;keep doing it Another way to write the above program is: HERE: CPL P1.0 ;set to high bit 0 of port 1 LCALL DELAY ;call the delay subroutine SJMP HERE ;keep doing it
8051

P1.0

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17

I/O BIT MANIPULATION PROGRAMMING I/O Ports and Bit Addressability
(cont’)

Instructions that are used for signal-bit operations are as following
Single-Bit Instructions
Instruction SETB bit CLR bit CPL bit JB bit, target JNB bit, target JBC bit, target Function Set the bit (bit = 1) Clear the bit (bit = 0) Complement the bit (bit = NOT bit) Jump to target if bit = 1 (jump if bit) Jump to target if bit = 0 (jump if no bit) Jump to target if bit = 1, clear bit (jump if bit, then clear)

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18

I/O BIT MANIPULATION PROGRAMMING Checking an Input Bit

The JNB and JB instructions are widely used single-bit operations
They allow you to monitor a bit and make a decision depending on whether it’s 0 or 1 These two instructions can be used for any bits of I/O ports 0, 1, 2, and 3
Port 3 is typically not used for any I/O, either single-bit or byte-wise
Instructions for Reading an Input Port
Mnemonic MOV A,PX JNB PX.Y, .. JB PX.Y, .. MOV C,PX.Y Examples MOV A,P2 JNB P2.1,TARGET JB P1.3,TARGET MOV C,P2.4 Description Bring into A the data at P2 pins Jump if pin P2.1 is low Jump if pin P1.3 is high Copy status of pin P2.4 to CY

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19

I/O BIT MANIPULATION PROGRAMMING Checking an Input Bit
(cont’)

Example 4-3 Write a program to perform the following: (a) Keep monitoring the P1.2 bit until it becomes high (b) When P1.2 becomes high, write value 45H to port 0 (c) Send a high-to-low (H-to-L) pulse to P2.3 Solution: SETB MOV AGAIN: JNB MOV SETB CLR P1.2 ;make P1.2 an input A,#45H ;A=45H P1.2,AGAIN ; get out when P1.2=1 P0,A ;issue A to P0 P2.3 ;make P2.3 high P2.3 ;make P2.3 low for H-to-L

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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

20

I/O BIT MANIPULATION PROGRAMMING Checking an Input Bit
(cont’)

Example 4-4 Assume that bit P2.3 is an input and represents the condition of an oven. If it goes high, it means that the oven is hot. Monitor the bit continuously. Whenever it goes high, send a high-to-low pulse to port P1.5 to turn on a buzzer. Solution: HERE: JNB SETB CLR SJMP P2.3,HERE P1.5 P1.5 HERE ;keep monitoring for high ;set bit P1.5=1 ;make high-to-low ;keep repeating

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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

21

I/O BIT MANIPULATION PROGRAMMING Checking an Input Bit
(cont’)

Example 4-5 A switch is connected to pin P1.7. Write a program to check the status of SW and perform the following: (a) If SW=0, send letter ‘N’ to P2 (b) If SW=1, send letter ‘Y’ to P2 Solution: SETB P1.7 AGAIN: JB P1.2,OVER MOV P2,#’N’ SJMP AGAIN OVER: MOV P2,#’Y’ SJMP AGAIN ;make P1.7 an input ;jump if P1.7=1 ;SW=0, issue ‘N’ to P2 ;keep monitoring ;SW=1, issue ‘Y’ to P2 ;keep monitoring

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

22

I/O BIT MANIPULATION PROGRAMMING Reading Single Bit into Carry Flag

Example 4-6 A switch is connected to pin P1.7. Write a program to check the status of SW and perform the following: (a) If SW=0, send letter ‘N’ to P2 (b) If SW=1, send letter ‘Y’ to P2 Use the carry flag to check the switch status. Solution: SETB AGAIN: MOV JC MOV SJMP OVER: MOV SJMP P1.7 C,P1.2 OVER P2,#’N’ AGAIN P2,#’Y’ AGAIN ;make P1.7 an input ;read SW status into CF ;jump if SW=1 ;SW=0, issue ‘N’ to P2 ;keep monitoring ;SW=1, issue ‘Y’ to P2 ;keep monitoring

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

23

I/O BIT MANIPULATION PROGRAMMING Reading Single Bit into Carry Flag
(cont’)

Example 4-7 A switch is connected to pin P1.0 and an LED to pin P2.7. Write a program to get the status of the switch and send it to the LED Solution: SETB AGAIN: MOV MOV SJMP P1.7 C,P1.0 P2.7,C AGAIN ;make ;read ;send ;keep P1.7 an input SW status into CF SW status to LED repeating

However ‘MOV P2,P1’ is a valid instruction

The instruction ‘MOV P2.7,P1.0’ is wrong , since such an instruction does not exist

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

24

I/O BIT MANIPULATION PROGRAMMING Reading Input Pins vs. Port Latch

In reading a port

Some instructions read the status of port pins Others read the status of an internal port latch

Therefore, when reading ports there are two possibilities:

Read the status of the input pin Read the internal latch of the output port

Confusion between them is a major source of errors in 8051 programming
Especially where external hardware is concerned

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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

25

READING INPUT PINS VS. PORT LATCH Reading Latch for Output Port

Some instructions read the contents of an internal port latch instead of reading the status of an external pin
For example, look at the ANL P1,A instruction and the sequence of actions is executed as follow
1. It reads the internal latch of the port and brings that data into the CPU 2. This data is ANDed with the contents of register A 3. The result is rewritten back to the port latch 4. The port pin data is changed and now has the same value as port latch

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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

26

READING INPUT PINS VS. PORT LATCH Reading Latch for Output Port
(cont’)

Read-Modify-Write
The instructions read the port latch normally read a value, perform an operation then rewrite it back to the port latch
Instructions Reading a latch (Read-Modify-Write)
Mnemonics
ANL PX ORL PX XRL JBC CPL INC PX PX.Y,TARGET PX.Y PX

Example
ANL P1,A ORL P2,A XRL JBC CPL INC P0,A P1.1,TARGET P1.2 P1

DEC PX DJNZ PX.Y,TARGET MOV PX.Y,C CLR PX.Y SETB PX.Y

DEC P2 DJNZ P1,TARGET MOV P1.2,C CLR P2.3 SETB P2.3 Note: x is 0, 1, 2, or 3 for P0 – P3

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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

27

I/O BIT MANIPULATION PROGRAMMING

The ports in 8051 can be accessed by the Read-modify-write technique
This feature saves many lines of code by combining in a single instruction all three actions
1. Reading the port 2. Modifying it 3. Writing to the port
MOV AGAIN: XRL ACALL SJMP P1,#55H ;P1=01010101 P1,#0FFH ;EX-OR P1 with 1111 1111 DELAY BACK

Read-modifywrite Feature

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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

28

ADDRESSING MODES
The 8051 Microcontroller and Embedded Systems: Using Assembly and C
Mazidi, Mazidi and McKinlay

Chung-Ping Young 楊中平
Home Automation, Networking, and Entertainment Lab

Dept. of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

ADDRESSING MODES

The CPU can access data in various ways, which are called addressing

modes

Immediate Register Direct Register indirect Indexed

Accessing memories

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2

IMMEDIATE ADDRESSING MODE

The source operand is a constant
The immediate data must be preceded by the pound sign, “#” Can load information into any registers, including 16-bit DPTR register
DPTR can also be accessed as two 8-bit registers, the high byte DPH and low byte DPL
MOV MOV MOV MOV MOV MOV A,#25H R4,#62 B,#40H DPTR,#4521H DPL,#21H DPH,#45H ;load 25H into A ;load 62 into R4 ;load 40H into B ;DPTR=4512H ;This is the same ;as above

;illegal!! Value > 65535 (FFFFH) MOV DPTR,#68975
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HANEL

3

IMMEDIATE ADDRESSING MODE
(cont’)

We can use EQU directive to access immediate data
Count ... MOV MOV ORG MYDATA: DB EQU 30 ... R4,#COUNT DPTR,#MYDATA 200H “America” ;R4=1EH ;DPTR=200H

We can also use immediate addressing mode to send data to 8051 ports
MOV P1,#55H

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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

4

REGISTER ADDRESSING MODE

Use registers to hold the data to be manipulated
MOV MOV ADD ADD MOV A,R0 R2,A A,R5 A,R7 R6,A ;copy contents of R0 into A ;copy contents of A into R2 ;add contents of R5 to A ;add contents of R7 to A ;save accumulator in R6

The source and destination registers must match in size
MOV DPTR,A

will give an error

MOV DPTR,#25F5H MOV R7,DPL MOV R6,DPH

The movement of data between Rn registers is not allowed
MOV R4,R7
HANEL

is invalid
5

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

ACCESSING MEMORY Direct Addressing Mode

It is most often used the direct addressing mode to access RAM locations 30 – 7FH
The entire 128 bytes of RAM can be accessed Direct addressing mode The register bank locations are accessed by the register names
MOV A,4 MOV A,R4 ;is same as ;which means copy R4 into A

Contrast this with immediate Register addressing mode addressing mode
There is no “#” sign in the operand
MOV R0,40H MOV 56H,A HANEL ;save content of 40H in R0 ;save content of A in 56H
6

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

ACCESSING MEMORY SFR Registers and Their Addresses

The SFR (Special Function Register) can be accessed by their names or by their addresses
MOV 0E0H,#55H MOV A,#55h MOV 0F0H,R0 MOV B,R0 ;is the same as ;load 55H into A ;is the same as ;copy R0 into B

The SFR registers have addresses between 80H and FFH
Not all the address space of 80 to FF is used by SFR The unused locations 80H to FFH are reserved and must not be used by the 8051 programmer
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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN
7

Special Function Register (SFR) Addresses

ACCESSING MEMORY SFR Registers and Their Addresses
(cont’)

Symbol ACC* B* PSW* SP DPTR DPL DPH P0* P1* P2* P3* IP* IE*

Name Accumulator B register Program status word Stack pointer Data pointer 2 bytes Low byte High byte Port 0 Port 1 Port 2 Port 3 Interrupt priority control Interrupt enable control

Address 0E0H 0F0H 0D0H 81H 82H 83H 80H 90H 0A0H 0B0H 0B8H 0A8H







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8

Special Function Register (SFR) Addresses

ACCESSING MEMORY SFR Registers and Their Addresses
(cont’)

Symbol TMOD TCON* T2CON* T2MOD TH0 TL0 TH1 TL1 TH2 TL2 RCAP2H RCAP2L SCON* SBUF PCON

Name Timer/counter mode control Timer/counter control Timer/counter 2 control Timer/counter mode control Timer/counter 0 high byte Timer/counter 0 low byte Timer/counter 1 high byte Timer/counter 1 low byte Timer/counter 2 high byte Timer/counter 2 low byte T/C 2 capture register high byte T/C 2 capture register low byte Serial control Serial data buffer Power ontrol

Address 89H 88H 0C8H OC9H 8CH 8AH 8DH 8BH 0CDH 0CCH 0CBH 0CAH 98H 99H 87H

* Bit addressable HANEL
Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN
9

ACCESSING MEMORY SFR Registers and Their Addresses
(cont’)

Example 5-1 Write code to send 55H to ports P1 and P2, using (a) their names (b) their addresses Solution : (a) MOV A,#55H MOV P1,A MOV P2,A (b) ;A=55H ;P1=55H ;P2=55H

From Table 5-1, P1 address=80H; P2 address=A0H MOV A,#55H ;A=55H MOV 80H,A ;P1=55H MOV 0A0H,A ;P2=55H

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

10

ACCESSING MEMORY Stack and Direct Addressing Mode

Only direct addressing mode is allowed for pushing or popping the stack
PUSH A is invalid Pushing the accumulator onto the stack must be coded as PUSH 0E0H
Example 5-2 Show the code to push R5 and A onto the stack and then pop them back them into R2 and B, where B = A and R2 = R5 Solution: PUSH 05 PUSH 0E0H POP 0F0H POP 02 ;push R5 onto stack ;push register A onto stack ;pop top of stack into B ;now register B = register A ;pop top of stack into R2 ;now R2=R6

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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

11

ACCESSING MEMORY Register Indirect Addressing Mode

A register is used as a pointer to the data
Only register R0 and R1 are used for this purpose R2 – R7 cannot be used to hold the address of an operand located in RAM

When R0 and R1 hold the addresses of RAM locations, they must be preceded by the “@” sign
MOV A,@R0 MOV @R1,B ;move contents of RAM whose ;address is held by R0 into A ;move contents of B into RAM ;whose address is held by R1

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

12

Example 5-3

ACCESSING MEMORY Register Indirect Addressing Mode
(cont’)

Write a program to copy the value 55H into RAM memory locations 40H to 41H using (a) direct addressing mode, (b) register indirect addressing mode without a loop, and (c) with a loop Solution:
(a) MOV A,#55H MOV 40H,A MOV 41H.A (b) MOV MOV MOV INC MOV (c) MOV A,#55H MOV R0,#40H MOV R2,#02 AGAIN: MOV @R0,A INC R0 DJNZ R2,AGAIN ;A=55H ;load pointer.R0=40H, ;load counter, R2=3 ;copy 55 to RAM R0 points to ;increment R0 pointer ;loop until counter = zero A,#55H R0,#40H @R0,A R0 @R0,A ;load A with value 55H ;load the pointer. R0=40H ;copy A to RAM R0 points to ;increment pointer. Now R0=41h ;copy A to RAM R0 points to ;load A with value 55H ;copy A to RAM location 40H ;copy A to RAM location 41H

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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

13

ACCESSING MEMORY Register Indirect Addressing Mode
(cont’)

The advantage is that it makes accessing data dynamic rather than static as in direct addressing mode
Looping is not possible in direct addressing mode
Example 5-4 Write a program to clear 16 RAM locations starting at RAM address 60H Solution: CLR A ;A=0 MOV R1,#60H ;load pointer. R1=60H MOV R7,#16 ;load counter, R7=16 AGAIN: MOV @R1,A ;clear RAM R1 points to INC R1 ;increment R1 pointer DJNZ R7,AGAIN ;loop until counter=zero
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14

ACCESSING MEMORY Register Indirect Addressing Mode
(cont’)

Example 5-5 Write a program to copy a block of 10 bytes of data from 35H to 60H Solution: MOV R0,#35H ;source pointer MOV R1,#60H ;destination pointer MOV R3,#10 ;counter BACK: MOV A,@R0 ;get a byte from source MOV @R1,A ;copy it to destination INC R0 ;increment source pointer INC R1 ;increment destination pointer DJNZ R3,BACK ;keep doing for ten bytes

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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

15

ACCESSING MEMORY Register Indirect Addressing Mode
(cont’)

R0 and R1 are the only registers that can be used for pointers in register indirect addressing mode Since R0 and R1 are 8 bits wide, their use is limited to access any information in the internal RAM Whether accessing externally connected RAM or on-chip ROM, we need 16-bit pointer
In such case, the DPTR register is used

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

16

ACCESSING MEMORY Indexed Addressing Mode and On-chip ROM Access

Indexed addressing mode is widely used in accessing data elements of look-up table entries located in the program ROM The instruction used for this purpose is
MOVC A,@A+DPTR Use instruction MOVC, “C” means code The contents of A are added to the 16-bit register DPTR to form the 16-bit address of the needed data

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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

17

Example 5-6

ACCESSING MEMORY

In this program, assume that the word “USA” is burned into ROM locations starting at 200H. And that the program is burned into ROM locations starting at 0. Analyze how the program works and state where “USA” is stored after this program is run.

Solution: Indexed ORG Addressing DPTR=200H, A=0 MOV CLR Mode and OnDPTR=200H, A=55H MOVC MOV chip ROMA=55H DPTR=201H, INC CLR Access

0000H ;burn into ROM starting at 0 DPTR,#200H ;DPTR=200H look-up table addr A ;clear A(A=0) A,@A+DPTR ;get the char from code space R0,A ;save it in R0 DPTR ;DPTR=201 point to next char A ;clear A(A=0) MOVC A,@A+DPTR ;get the next char R0=55H DPTR=201H, A=0 (cont’) MOV R1,A ;save it in R1 INC DPTR ;DPTR=202 point to next char DPTR=201H, A=53H CLR A ;clear A(A=0) MOVC A,@A+DPTR ;get the next char R1=53H DPTR=202H, A=53H MOV R2,A ;save it in R2 Here: SJMP HERE ;stay here ;Data is burned into code space starting at 200H 202 A 201 200 S U ORG 200H MYDATA:DB “USA” END

R2=41H
;end of program

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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

18

ACCESSING MEMORY Look-up Table
(cont’)

The look-up table allows access to elements of a frequently used table with minimum operations
Example 5-8 Write a program to get the x value from P1 and send x2 to P2, continuously Solution: ORG MOV MOV MOV BACK:MOV MOV MOV SJMP 0 DPTR,#300H A,#0FFH P1,A A,P1 A,@A+DPTR P2,A BACK

;LOAD TABLE ADDRESS ;A=FF ;CONFIGURE P1 INPUT PORT ;GET X ;GET X SQAURE FROM TABLE ;ISSUE IT TO P2 ;KEEP DOING IT

ORG 300H XSQR_TABLE: DB 0,1,4,9,16,25,36,49,64,81 END HANEL
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19

ACCESSING MEMORY Indexed Addressing Mode and MOVX

In many applications, the size of program code does not leave any room to share the 64K-byte code space with data
The 8051 has another 64K bytes of memory space set aside exclusively for data storage
This data memory space is referred to as external memory and it is accessed only by the MOVX instruction

The 8051 has a total of 128K bytes of memory space
64K bytes of code and 64K bytes of data The data space cannot be shared between code and data
HANEL
Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN
20

ACCESSING MEMORY RAM Locations 30 – 7FH as Scratch Pad

In many applications we use RAM locations 30 – 7FH as scratch pad
We use R0 – R7 of bank 0 Leave addresses 8 – 1FH for stack usage If we need more registers, we simply use RAM locations 30 – 7FH
Example 5-10 Write a program to toggle P1 a total of 200 times. Use RAM location 32H to hold your counter value instead of registers R0 – R7 Solution: MOV MOV LOP1: CPL ACALL DJNZ P1,#55H 32H,#200 P1 DELAY 32H,LOP1 ;P1=55H ;load counter value ;into RAM loc 32H ;toggle P1 ;repeat 200 times
21

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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

BIT ADDRESSES

Many microprocessors allow program to access registers and I/O ports in byte size only
However, in many applications we need to check a single bit

One unique and powerful feature of the 8051 is single-bit operation
Single-bit instructions allow the programmer to set, clear, move, and complement individual bits of a port, memory, or register It is registers, RAM, and I/O ports that need to be bit-addressable
ROM, holding program code for execution, is not bit-addressable
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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

22

BIT ADDRESSES BitAddressable RAM

The bit-addressable RAM location are 20H to 2FH
These 16 bytes provide 128 bits of RAM bit-addressability, since 16 × 8 = 128
0 to 127 (in decimal) or 00 to 7FH

The first byte of internal RAM location 20H has bit address 0 to 7H The last byte of 2FH has bit address 78H to 7FH

Internal RAM locations 20-2FH are both byte-addressable and bitaddressable

Bit address 00-7FH belong to RAM byte addresses 20-2FH Bit address 80-F7H belong to SFR P0, P1, …

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

23

7F 30

General purpose RAM
7F 77 6F 67 5F 57 4F 47 3F 37 2F 27 1F 17 0F 07 7E 76 6E 66 5E 56 4E 46 3E 36 2E 26 1E 16 0E 06 7D 75 6D 65 5D 55 4D 45 3D 35 2D 25 1D 15 0D 05 7C 74 6C 64 5C 54 4C 44 3C 34 2C 24 1C 14 0C 04 7B 73 6B 63 5B 53 4B 43 3B 33 2B 23 1B 13 0B 03 7A 72 6A 62 5A 52 4A 42 3A 32 2A 22 1A 12 0A 02 79 71 69 61 59 51 49 41 39 31 29 21 19 11 09 01 78 70 68 60 58 50 48 40 38 30 28 20 18 10 08 00

BIT ADDRESSES BitAddressable RAM
(cont’)
Bit-addressable locations

2F 2E 2D 2C 2B 2A 29 28 27

Byte address

26 25 24 23 22 21 20 1F 18 17 10 0F 08 07 00

Bank 3 Bank 2 Bank 1 Default register bank for R0-R7

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

24

BIT ADDRESSES BitAddressable RAM
(cont’)

Example 5-11 Find out to which by each of the following bits belongs. Give the address of the RAM byte in hex (a) SETB 42H, (b) CLR 67H, (c) CLR 0FH (d) SETB 28H, (e) CLR 12, (f) SETB 05
D7 D6 7E 76 6E 66 5E 56 4E 46 3E 36 2E 26 1E 16 0E 06 D5 7D 75 6D 65 5D 55 4D 45 3D 35 2D 25 1D 15 0D 05 D4 7C 74 6C 64 5C 54 4C 44 3C 34 2C 24 1C 14 0C 04 D3 7B 73 6B 63 5B 53 4B 43 3B 33 2B 23 1B 13 0B 03 D2 7A 72 6A 62 5A 52 4A 42 3A 32 2A 22 1A 12 0A 02 D1 79 71 69 61 59 51 49 41 39 31 29 21 19 11 09 01 D0 78 70 68 60 58 50 48 40 38 30 28 20 18 10 08 00

Solution: (a) D2 of RAM location 28H (b) D7 of RAM location 2CH (c) D7 of RAM location 21H (d) D0 of RAM location 25H (e) D4 of RAM location 21H (f) D5 of RAM location 20H

2F 2E 2D 2C 2B 2A 29 28 27 26 25 24 23 22 21 20

7F 77 6F 67 5F 57 4F 47 3F 37 2F 27 1F 17 0F 07

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

25

BIT ADDRESSES BitAddressable RAM
(cont’)

To avoid confusion regarding the addresses 00 – 7FH
The 128 bytes of RAM have the byte addresses of 00 – 7FH can be accessed in byte size using various addressing modes
Direct and register-indirect

The 16 bytes of RAM locations 20 – 2FH have bit address of 00 – 7FH
We can use only the single-bit instructions and these instructions use only direct addressing mode

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

26

BIT ADDRESSES BitAddressable RAM
(cont’)

Instructions that are used for signal-bit operations are as following
Single-Bit Instructions Instruction SETB bit CLR CPL JB JNB JBC bit bit bit, target bit, target bit, target Function Set the bit (bit = 1) Clear the bit (bit = 0) Complement the bit (bit = NOT bit) Jump to target if bit = 1 (jump if bit) Jump to target if bit = 0 (jump if no bit) Jump to target if bit = 1, clear bit (jump if bit, then clear)

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

27

BIT ADDRESSES I/O Port Bit Addresses

While all of the SFR registers are byteaddressable, some of them are also bitaddressable
The P0 – P3 are bit addressable

We can access either the entire 8 bits or any single bit of I/O ports P0, P1, P2, and P3 without altering the rest When accessing a port in a single-bit manner, we use the syntax SETB X.Y
X is the port number P0, P1, P2, or P3 Y is the desired bit number from 0 to 7 for data bits D0 to D7 ex. SETB P1.5 sets bit 5 of port 1 high
Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

HANEL

28

BIT ADDRESSES I/O Port Bit Addresses
(cont’)

Notice that when code such as SETB P1.0 is assembled, it becomes
SETB 90H The bit address for I/O ports
P0 P1 P2 P3 are are are are 80H to 87H 90H to 97H A0H to A7H B0H to B7H

Single-Bit Addressability of Ports
P0
P0.0 (80) P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 (87)

P1
P1.0 (90) P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 (97)

P2
P2.0 (A0) P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 (A7)

P3
P3.0 (B0) P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7 (B7)

Port Bit
D0 D1 D2 D3 D4 D5 D6 D7

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

29

SFR RAM Address (Byte and Bit)

BIT ADDRESSES I/O Port Bit Addresses
(cont’)

Byte address
FF F0

Bit address
B

Byte address
98

Bit addresses 80 – F7H belong to SFR of P0, TCON, P1, SCON, P2, etc
Bit address
SCON

9F 9E 9D 9C 9B 9A 99 98

F7 F6 F5 F4 F3 F2 F1 F0

90 E0 E7 E6 E5 E4 E3 E2 E1 E0 ACC 8D D0 D7 D6 D5 D4 D3 D2 D1 D0 PSW 8C 8B 8A B8 B0 A8 A0 99 -- -- -- BC BB BA B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 AF AE AD AC AB AA A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 not bit addressable IP P3 IE P2 SBUF 89 88 87

97 96 95 94 93 92 91 90

P1

not bit addressable not bit addressable not bit addressable not bit addressable not bit addressable 8F 8E 8D 8C 8B 8A 89 88 not bit addressable

TH1 TH0 TL1 TL0 TMOD TCON PCON

83 82 81 80

not bit addressable not bit addressable not bit addressable 87 86 85 84 83 82 81 80

DPH DPL SP P0

Special Function Register HANEL
Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN
30

BIT ADDRESSES Registers BitAddressability

Only registers A, B, PSW, IP, IE, ACC, SCON, and TCON are bit-addressable
While all I/O ports are bit-addressable

In PSW register, two bits are set aside for the selection of the register banks
Upon RESET, bank 0 is selected We can select any other banks using the bit-addressability of the PSW
CY AC -RS1 RS0 OV -P

RS1 0 0 1 1

RS0 0 1 0 1

Register Bank 0 1 2 3

Address 00H - 07H 08H - 0FH 10H - 17H 18H - 1FH

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

31

BIT ADDRESSES Registers BitAddressability
(cont’)

Example 5-13 Write a program to save the accumulator in R7 of bank 2. Solution:
CLR SETB MOV PSW.3 PSW.4 R7,A

Example 5-14 While there are instructions such as JNC and JC to check the carry flag bit (CY), there are no such instructions for the overflow flag bit (OV). How would you write code to check OV? Solution:
JB
CY AC

PSW.2,TARGET
-RS1

;jump if OV=1
RS0 OV -P

Example 5-18 While a program to save the status of bit P1.7 on RAM address bit 05. Solution:
MOV MOV C,P1.7 05,C

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

32

BIT ADDRESSES Registers BitAddressability
(cont’)

Example 5-15 Write a program to see if the RAM location 37H contains an even value. If so, send it to P2. If not, make it even and then send it to P2. Solution:
MOV JNB INC MOV A,37H ;load RAM 37H into ACC ACC.0,YES ;if D0 of ACC 0? If so jump A ;it’s odd, make it even P2,A ;send it to P2

YES:

Example 5-17 The status of bits P1.2 and P1.3 of I/O port P1 must be saved before they are changed. Write a program to save the status of P1.2 in bit location 06 and the status of P1.3 in bit location 07 Solution:
CLR CLR JNB SETB OVER: JNB SETB NEXT: ... 06 07 P1.2,OVER 06 P1.3,NEXT 07 ;clear bit addr. 06 ;clear bit addr. 07 ;check P1.2, if 0 then jump ;if P1.2=1,set bit 06 to 1 ;check P1.3, if 0 then jump ;if P1.3=1,set bit 07 to 1

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

33

BIT ADDRESSES Using BIT

The BIT directive is a widely used directive to assign the bit-addressable I/O and RAM locations
Allow a program to assign the I/O or RAM bit at the beginning of the program, making it easier to modify them
Example 5-22 A switch is connected to pin P1.7 and an LED to pin P2.0. Write a program to get the status of the switch and send it to the LED. Solution:
LED SW HERE: BIT BIT MOV MOV SJMP P1.7 P2.0 C,SW LED,C HERE ;assign bit ;assign bit ;get the bit from the port ;send the bit to the port ;repeat forever

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

34

BIT ADDRESSES Using BIT
(cont’)

Example 5-20 Assume that bit P2.3 is an input and represents the condition of an oven. If it goes high, it means that the oven is hot. Monitor the bit continuously. Whenever it goes high, send a high-to-low pulse to port P1.5 to turn on a buzzer. Solution:
OVEN_HOT BIT P2.3 BUZZER BIT P1.5 HERE: JNB OVEN_HOT,HERE ;keep monitoring ACALL DELAY CPL BUZZER ;sound the buzzer ACALL DELAY SJMP HERE

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

35

BIT ADDRESSES Using EQU

Use the EQU to assign addresses
Defined by names, like P1.7 or P2 Defined by addresses, like 97H or 0A0H
Example 5-24 A switch is connected to pin P1.7. Write a program to check the status of the switch and make the following decision. (a) If SW = 0, send “0” to P2 (b) If SW = 1, send “1“ to P2 Solution:
SW EQU P1.7 MYDATA EQU P2 HERE: MOV C,SW JC OVER MOV MYDATA,#’0’ SJMP HERE OVER: MOV MYDATA,#’1’ SJMP HERE END SW EQU 97H MYDATA EQU 0A0H

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

36

EXTRA 128 BYTE ON-CHIP RAM IN 8052

The 8052 has another 128 bytes of onchip RAM with addresses 80 – FFH
It is often called upper memory
Use indirect addressing mode, which uses R0 and R1 registers as pointers with values of 80H or higher – MOV @R0, A and MOV @R1, A

The same address space assigned to the SFRs
Use direct addressing mode – MOV 90H, #55H is the same as MOV P1, #55H

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

37

EXTRA 128 BYTE ON-CHIP RAM IN 8052
(cont’)

Example 5-27 Assume that the on-chip ROM has a message. Write a program to copy it from code space into the upper memory space starting at address 80H. Also, as you place a byte in upper RAM, give a copy to P0. Solution:
ORG 0 MOV DPTR,#MYDATA MOV R1,#80H ;access the upper memory B1: CLR A MOVC A,@A+DPTR ;copy from code ROM MOV @R1,A ;store in upper memory MOV P0,A ;give a copy to P0 JZ EXIT ;exit if last byte INC DPTR ;increment DPTR INC R1 ;increment R1 SJMP B1 ;repeat until last byte EXIT: SJMP $ ;stay here when finished ;--------------ORG 300H MYDATA: DB “The Promise of World Peace”,0 END

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Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

38

ARITHMETIC & LOGIC INSTRUCTIONS AND PROGRAMS
The 8051 Microcontroller and Embedded Systems: Using Assembly and C
Mazidi, Mazidi and McKinlay

Chung-Ping Young 楊中平
Home Automation, Networking, and Entertainment Lab

Dept. of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

ADD ARITHMETIC INSTRUCTIONS Addition of Unsigned Numbers

A,source

;A = A + source

The instruction ADD is used to add two operands
Destination operand is always in register A Source operand can be a register, immediate data, or in memory Memory-to-memory arithmetic operations are never allowed in 8051 Assembly language
Show how the flag register is affected by the following instruction. MOV A,#0F5H ;A=F5 hex CY =1, since there is a ADD A,#0BH ;A=F5+0B=00 carry out from D7 Solution: + F5H 0BH 100H 1111 0101 + 0000 1011 0000 0000
PF =1, because the number of 1s is zero (an even number), PF is set to 1. AC =1, since there is a carry from D3 to D4

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

2

ARITHMETIC INSTRUCTIONS Addition of Individual Bytes

Assume that RAM locations 40 – 44H have the following values. Write a program to find the sum of the values. At the end of the program, register A should contain the low byte and R7 the high byte. 40 = (7D) 41 = (EB) 42 = (C5) 43 = (5B) 44 = (30) Solution: MOV R0,#40H ;load pointer MOV R2,#5 ;load counter CLR A ;A=0 MOV R7,A ;clear R7 AGAIN: ADD A,@R0 ;add the byte ptr to by R0 JNC NEXT ;if CY=0 don’t add carry INC R7 ;keep track of carry NEXT: INC R0 ;increment pointer DJNZ R2,AGAIN ;repeat until R2 is zero

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

3

ARITHMETIC INSTRUCTIONS ADDC and Addition of 16Bit Numbers

When adding two 16-bit data operands, the propagation of a carry from lower byte to higher byte is concerned
+ 1 3C E7 3B 8D 78 74 When the first byte is added (E7+8D=74, CY=1). The carry is propagated to the higher byte, which result in 3C + 3B + 1 =78 (all in hex)

Write a program to add two 16-bit numbers. Place the sum in R7 and R6; R6 should have the lower byte. Solution:
CLR MOV ADD MOV MOV ADDC MOV C A, #0E7H A, #8DH R6, A A, #3CH A, #3BH R7, A ;make CY=0 ;load the low byte now A=E7H ;add the low byte ;save the low byte sum in R6 ;load the high byte ;add with the carry ;save the high byte sum

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

4

ARITHMETIC INSTRUCTIONS BCD Number System

The binary representation of the digits 0 to 9 is called BCD (Binary Coded Decimal) Digit BCD
Unpacked BCD
In unpacked BCD, the lower 4 bits of the number represent the BCD number, and the rest of the bits are 0 Ex. 00001001 and 00000101 are unpacked BCD for 9 and 5
0 1 2 3 4 5 6 7 8 9 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001

Packed BCD
In packed BCD, a single byte has two BCD number in it, one in the lower 4 bits, and one in the upper 4 bits Ex. 0101 1001 is packed BCD for 59H
HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

5

ARITHMETIC INSTRUCTIONS Unpacked and Packed BCD

Adding two BCD numbers must give a BCD result Adding these two
MOV ADD A, #17H A, #28H numbers gives 0011 1111B (3FH), Which is not BCD!

The result above should have been 17 + 28 = 45 (0100 0101). To correct this problem, the programmer must add 6 (0110) to the low digit: 3F + 06 = 45H.

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

6

DA A ;decimal adjust for addition ARITHMETIC INSTRUCTIONS DA Instruction

The DA instruction is provided to correct the aforementioned problem associated with BCD addition
The DA instruction will add 6 to the lower nibble or higher nibble if need
Example: 6CH MOV A,#47H ;A=47H first BCD operand MOV B,#25H ;B=25H second BCD operand ADD A,B ;hex(binary) addition(A=6CH) DA A ;adjust for BCD addition (A=72H) 72H

DA works only after an ADD, but not after INC

The “DA” instruction works only on A. In other word, while the source can be an operand of any addressing mode, the destination must be in register A in order for DA to work.
Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

HANEL

7

ARITHMETIC INSTRUCTIONS DA Instruction
(cont’)

Summary of DA instruction
After an ADD or ADDC instruction
1. If the lower nibble (4 bits) is greater than 9, or if AC=1, add 0110 to the lower 4 bits 2. If the upper nibble is greater than 9, or if CY=1, add 0110 to the upper 4 bits
Example: HEX 29 + 18 41 + 6 47 BCD 0010 1001 + 0001 1000 0100 0001 + 0110 0100 0111

AC=1

Since AC=1 after the addition, ”DA A” will add 6 to the lower nibble. The final result is in BCD format. HANEL
Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN
8

ARITHMETIC INSTRUCTIONS DA Instruction
(cont’)

Assume that 5 BCD data items are stored in RAM locations starting at 40H, as shown below. Write a program to find the sum of all the numbers. The result must be in BCD. 40=(71) 41=(11) 42=(65) 43=(59) 44=(37) Solution: MOV R0,#40H ;Load pointer MOV R2,#5 ;Load counter CLR A ;A=0 MOV R7,A ;Clear R7 AGAIN: ADD A,@R0 ;add the byte pointer ;to by R0 DA A ;adjust for BCD JNC NEXT ;if CY=0 don’t ;accumulate carry INC R7 ;keep track of carries NEXT: INC R0 ;increment pointer DJNZ R2,AGAIN ;repeat until R2 is 0
Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

HANEL

9

ARITHMETIC INSTRUCTIONS Subtraction of Unsigned Numbers

In many microprocessor there are two different instructions for subtraction: SUB and SUBB (subtract with borrow)
In the 8051 we have only SUBB The 8051 uses adder circuitry to perform the subtraction SUBB A,source ;A = A – source – CY

To make SUB out of SUBB, we have to make CY=0 prior to the execution of the instruction
Notice that we use the CY flag for the borrow

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

10

ARITHMETIC INSTRUCTIONS Subtraction of Unsigned Numbers
(cont’)

SUBB when CY = 0
1. 2. 3.

Take the 2’s complement of the subtrahend (source operand) Add it to the minuend (A) Invert the carry
CLR MOV SUBB JNC CPL INC MOV C A,#4C ;load A with value 4CH A,#6EH ;subtract 6E from A NEXT ;if CY=0 jump to NEXT A ;if CY=1, take 1’s complement A ;and increment to get 2’s comp R1,A ;save A in R1
2’s complement +

NEXT: Solution:
CY=0, the result is positive; CY=1, the result is negative and the destination has the 2’s complement of the result

4C - 6E -22

0100 1100 0110 1110
CY =1

0100 1100 1001 0010 01101 1110
Invert carry

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

11

ARITHMETIC INSTRUCTIONS Subtraction of Unsigned Numbers
(cont’)

SUBB when CY = 1
This instruction is used for multi-byte numbers and will take care of the borrow of the lower operand
CLR MOV SUBB MOV MOV SUBB MOV Solution: C A,#62H A,#96H R7,A A,#27H A,#12H R6,A
A = 62H – 96H – 0 = CCH CY = 1

;A=62H ;62H-96H=CCH with CY=1 ;save the result ;A=27H ;27H-12H-1=14H ;save the result

A = 27H - 12H - 1 = 14H CY = 0

We have 2762H - 1296H = 14CCH.

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

12

ARITHMETIC INSTRUCTIONS Unsigned Multiplication

The 8051 supports byte by byte multiplication only
The byte are assumed to be unsigned data MUL AB ;AxB, 16-bit result in B, A
MOV MOV MUL A,#25H B,#65H AB ;load 25H to ;load 65H to ;25H * 65H = ;B = OEH and reg. A reg. B E99 where A = 99H

Unsigned Multiplication Summary (MUL AB)
Multiplication Byte x byte Operand1 A Operand2 B Result B = high byte A = low byte

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

13

ARITHMETIC INSTRUCTIONS Unsigned Division

The 8051 supports byte over byte division only
The byte are assumed to be unsigned data DIV AB ;divide A by B, A/B
MOV MOV MUL A,#95 B,#10 AB ;load 95 to reg. A ;load 10 to reg. B ;A = 09(quotient) and ;B = 05(remainder)

Unsigned Division Summary (DIV AB)
Division Byte / byte Numerator A Denominator B Quotient A Remainder B

CY is always 0 If B ≠ 0, OV = 0 If B = 0, OV = 1 indicates error

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

14

ARITHMETIC INSTRUCTIONS Application for DIV

(a) Write a program to get hex data in the range of 00 – FFH from port 1 and convert it to decimal. Save it in R7, R6 and R5. (b) Assuming that P1 has a value of FDH for data, analyze program. Solution: (a)
MOV MOV MOV MOV DIV MOV MOV DIV MOV MOV A,#0FFH P1,A A,P1 B,#10 AB R7,B B,#10 AB R6,B R5,A ;make P1 an input port ;read data from P1 ;B=0A hex ;divide by 10 ;save lower digit ;divide by 10 once more ;save the next digit ;save the last digit

(b) To convert a binary (hex) value to decimal, we divide it by 10 repeatedly until the quotient is less than 10. After each division the remainder is saves. Q R FD/0A = 19 3 (low digit) 19/0A = 2 5 (middle digit) 2 (high digit) Therefore, we have FDH=253. HANEL
Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN
15

SIGNED ARITHMETIC INSTRUCTIONS Signed 8-bit Operands

D7 (MSB) is the sign and D0 to D6 are the magnitude of the number
If D7=0, the operand is positive, and if D7=1, it is negative
D7 D6 D5 D4 D3 D2 D1 D0

Positive numbers are 0 to +127 Negative number representation (2’s complement)
1. 2. 3.

Sign

Magnitude

Write the magnitude of the number in 8-bit binary (no sign) Invert each bit Add 1 to it
16

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

Show how the 8051 would represent -34H

SIGNED ARITHMETIC INSTRUCTIONS Signed 8-bit Operands
(cont’)

Solution: 1. 0011 0100 2. 1100 1011 3. 1100 1100

34H given in binary invert each bit add 1 (which is CC in hex)

Signed number representation of -34 in 2’s complement is CCH Decimal
-128 -127 -126 ... -2 -1 0 +1 +2 ... +127

Binary
1000 1000 1000 ... ... 1111 1111 0000 0000 0000 ... ... 0111 0000 0001 0010 1110 1111 0000 0001 0010 1111

Hex
80 81 82 ... FE FF 00 01 02 ... 7F
17

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

SIGNED ARITHMETIC INSTRUCTIONS Overflow Problem

If the result of an operation on signed numbers is too large for the register An overflow has occurred and the programmer must be noticed
Examine the following code and analyze the result. MOV MOV ADD Solution: +96 + +70 + 166 0110 0000 0100 0110 1010 0110 and OV =1 A,#+96 R1,#+70 A,R1 ;A=0110 0000 (A=60H) ;R1=0100 0110(R1=46H) ;A=1010 0110 ;A=A6H=-90,INVALID

According to the CPU, the result is -90, which is wrong. The CPU sets OV=1 to indicate the overflow
Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

HANEL

18

SIGNED ARITHMETIC INSTRUCTIONS OV Flag

In 8-bit signed number operations, OV is set to 1 if either occurs:
1. 2.

There is a carry from D6 to D7, but no carry out of D7 (CY=0) There is a carry from D7 out (CY=1), but no carry from D6 to D7
;A=1000 0000(A=80H) ;R4=1111 1110(R4=FEH) ;A=0111 1110(A=7EH=+126,INVALID) 1000 0000 1111 1110 0111 1110 and OV=1 OV = 1 The result +126 is wrong

MOV A,#-128 MOV R4,#-2 ADD A,R4 -128 + -2 -130

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

19

SIGNED ARITHMETIC INSTRUCTIONS OV Flag
(cont’)

MOV A,#-2 MOV R1,#-5 ADD A,R1 -2 -5 -7

+

;A=1111 1110(A=FEH) ;R1=1111 1011(R1=FBH) ;A=1111 1001(A=F9H=-7, ;Correct, OV=0) 1111 1110 1111 1011 1111 1001 and OV=0 OV = 0 The result -7 is correct

MOV A,#+7 ;A=0000 0111(A=07H) MOV R1,#+18 ;R1=0001 0010(R1=12H) ADD A,R1 ;A=0001 1001(A=19H=+25, ;Correct,OV=0) 7 0000 0111 + 18 0001 0010 25 0001 1001 and OV=0 OV = 0 The result +25 is correct HANEL
Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN
20

SIGNED ARITHMETIC INSTRUCTIONS OV Flag
(cont’)

In unsigned number addition, we must monitor the status of CY (carry)
Use JNC or JC instructions

In signed number addition, the OV (overflow) flag must be monitored by the programmer
JB PSW.2 or JNB PSW.2

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

21

SIGNED ARITHMETIC INSTRUCTIONS 2's Complement

To make the 2’s complement of a number
CPL ADD A A,#1 ;1’s complement (invert) ;add 1 to make 2’s comp.

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

22

LOGIC AND COMPARE INSTRUCTIONS

ANL destination,source ;dest = dest AND source

AND

This instruction will perform a logic AND on the two operands and place the result in the destination
The destination is normally the accumulator The source operand can be a register, in memory, or immediate
Show the results of the following. MOV ANL 35H 0FH 05H ;A = 35H ;A = A AND 0FH ANL is often used to 0 0 1 1 0 1 0 1 mask (set to 0) certain 0 0 0 0 1 1 1 1 bits of an operand 0 0 0 0 0 1 0 1 A,#35H A,#0FH

X 0 0 1 1

Y 0 1 0 1

X AND Y 0 0 0 1

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

23

LOGIC AND COMPARE INSTRUCTIONS

ORL destination,source ;dest = dest OR source

OR

The destination and source operands are ORed and the result is placed in the destination
The destination is normally the accumulator The source operand can be a register, in memory, or immediate
Show the results of the following. MOV ORL 04H 68H 6CH A,#04H A,#68H ;A = 04 ;A = 6C ORL instruction can be used to set certain bits of an operand to 1

X 0 0 1 1

Y 0 1 0 1

X OR Y 0 1 1 1

0 0 0 0 0 1 0 0 0 1 1 0 1 0 0 0 0 1 1 0 1 1 0 0

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

24

LOGIC AND COMPARE INSTRUCTIONS

XRL destination,source ;dest = dest XOR source

XOR

This instruction will perform XOR operation on the two operands and place the result in the destination
The destination is normally the accumulator The source operand can be a register, in memory, or immediate

X 0 0 1 1

Y 0 1 0 1

X XOR Y 0 1 1 0

Show the results of the following. MOV XRL 54H 78H 2CH A,#54H A,#78H 0 1 0 1 0 1 0 0 0 1 1 1 1 0 0 0 0 0 1 0 1 1 0 0

XRL instruction can be used to toggle certain bits of an operand

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

25

LOGIC AND COMPARE INSTRUCTIONS
(cont’)

The XRL instruction can be used to clear the contents of a register by XORing it with itself. Show how XRL A,A clears A, assuming that AH = 45H. 45H 45H 00H 0 1 0 0 0 1 0 1 0 1 0 0 0 1 0 1 0 0 0 0 0 0 0 0

XOR

HANEL

Read and test P1 to see whether it has the value 45H. If it does, send 99H to P2; otherwise, it stays cleared. XRL can be used to see if two registers Solution: MOV P2,#00 ;clear P2 have the same value MOV P1,#0FFH ;make P1 an input port MOV R3,#45H ;R3=45H MOV A,P1 ;read P1 XRL A,R3 JNZ EXIT ;jump if A is not 0 MOV P2,#99H EXIT: ... If both registers have the same value, 00 is placed in A. JNZ and JZ test the contents of the Department of Computer Science and Information Engineering accumulator.
National Cheng Kung University, TAIWAN
26

LOGIC AND COMPARE INSTRUCTIONS

CPL A ;complements the register A

This is called 1’s complement
MOV A, #55H CPL A ;now A=AAH ;0101 0101(55H) ;becomes 1010 1010(AAH)

Complement Accumulator

To get the 2’s complement, all we have to do is to to add 1 to the 1’s complement

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

27

LOGIC AND COMPARE INSTRUCTIONS

CJNE destination,source,rel. addr.

Compare Instruction

The actions of comparing and jumping are combined into a single instruction called CJNE (compare and jump if not equal)
The CJNE instruction compares two operands, and jumps if they are not equal The destination operand can be in the accumulator or in one of the Rn registers The source operand can be in a register, in memory, or immediate
The operands themselves remain unchanged

It changes the CY flag to indicate if the destination operand is larger or smaller
HANEL
Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN
28

LOGIC AND COMPARE INSTRUCTIONS

Compare Instruction
(cont’)

CJNE R5,#80,NOT_EQUAL ;check R5 for 80 ... ;R5 = 80 NOT_EQUAL: JNC NEXT ;jump if R5 > 80 ... ;R5 < 80 NEXT: ... Compare destination ≥ source destination < source Carry Flag CY = 0 CY = 1

CY flag is always checked for cases of greater or less than, but only after it is determined that they are not equal

Notice in the CJNE instruction that any Rn register can be compared with an immediate value
There is no need for register A to be involved

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

29

LOGIC AND COMPARE INSTRUCTIONS

The compare instruction is really a subtraction, except that the operands remain unchanged
Flags are changed according to the execution of the SUBB instruction
Write a program to read the temperature and test it for the value 75. According to the test results, place the temperature value into the registers indicated by the following. If T = 75 then A = 75 If T < 75 then R1 = T If T > 75 then R2 = T Solution:
MOV MOV CJNE SJMP JNC MOV SJMP MOV ... P1,#0FFH A,P1 A,#75,OVER EXIT NEXT R1,A EXIT R2,A ;make P1 an input port ;read P1 port ;jump if A is not 75 ;A=75, exit ;if CY=0 then A>75 ;CY=1, A75, save it in R2

Compare Instruction
(cont’)

OVER: NEXT: EXIT:

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

30

ROTATE INSTRUCTION AND DATA SERIALIZATION

RR A

;rotate right A The 8 bits of the accumulator are rotated right one bit, and Bit D0 exits from the LSB and enters into MSB, D7

In rotate right

Rotating Right and Left

MSB
MOV RR RR RR RR HANEL A,#36H A A A A

LSB
;A ;A ;A ;A ;A = = = = = 0011 0001 1000 1100 0110 0110 1011 1101 0110 0011

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

31

ROTATE INSTRUCTION AND DATA SERIALIZATION

RL A

;rotate left A The 8 bits of the accumulator are rotated left one bit, and Bit D7 exits from the MSB and enters into LSB, D0
MSB
MOV A,#72H RL A RL A

In rotate left

Rotating Right and Left
(cont’)

LSB
;A = 0111 0010 ;A = 1110 0100 ;A = 1100 1001

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

32

ROTATE INSTRUCTION AND DATA SERIALIZATION

RRC A

;rotate right through carry

In RRC A
Bits are rotated from left to right They exit the LSB to the carry flag, and the carry flag enters the MSB

Rotating through Carry

MSB
CLR MOV RRC RRC RRC C A,#26H A A A

LSB
;make CY = 0 ;A = 0010 0110 ;A = 0001 0011 ;A = 0000 1001 ;A = 1000 0100

CY

CY = 0 CY = 1 CY = 1

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

33

ROTATE INSTRUCTION AND DATA SERIALIZATION

RLC A

;rotate left through carry

In RLC A
Bits are shifted from right to left They exit the MSB and enter the carry flag, and the carry flag enters the LSB
CY MSB LSB

Rotating through Carry
(cont’)

Write a program that finds the number of 1s in a given byte. MOV MOV MOV AGAIN: RLC JNC INC NEXT: DJNZ HANEL R1,#0 R7,#8 A,#97H A NEXT R1 R7,AGAIN ;count=08 ;check for CY ;if CY=1 add to count

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

34

ROTATE INSTRUCTION AND DATA SERIALIZATION

Serializing data is a way of sending a byte of data one bit at a time through a single pin of microcontroller
Using the serial port, discussed in Chapter 10 To transfer data one bit at a time and control the sequence of data and spaces in between them

Serializing Data

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

35

ROTATE INSTRUCTION AND DATA SERIALIZATION

Transfer a byte of data serially by
Moving CY to any pin of ports P0 – P3 Using rotate instruction
Write a program to transfer value 41H serially (one bit at a time) via pin P2.1. Put two highs at the start and end of the data. Send the byte LSB first. Solution: MOV SETB SETB MOV AGAIN: RRC MOV DJNZ SETB SETB A,#41H P2.1 P2.1 R5,#8 A P2.1,C R5,HERE P2.1 P2.1 ;high ;high ;send CY to P2.1 ;high ;high

Serializing Data
(cont’)

Pin Register A
D7 HANEL D0
36

CY

P2.1

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

ROTATE INSTRUCTION AND DATA SERIALIZATION

Write a program to bring in a byte of data serially one bit at a time via pin P2.7 and save it in register R2. The byte comes in with the LSB first. Solution: MOV AGAIN: MOV RRC DJNZ MOV R5,#8 C,P2.7 A R5,HERE R2,A ;bring in bit ;save it

Serializing Data
(cont’)

Pin P2.7 CY
D7

Register A
D0

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

37

ROTATE INSTRUCTION AND DATA SERIALIZATION

There are several instructions by which the CY flag can be manipulated directly
Instruction
SETB CLR CPL MOV MOV JNC JC ANL ANL ORL ORL C C C b,C C,b target target C,bit C,/bit C,bit C,/bit

Function
Make CY = 1 Clear carry bit (CY = 0) Complement carry bit Copy carry status to bit location (CY = b) Copy bit location status to carry (b = CY) Jump to target if CY = 0 Jump to target if CY = 1 AND CY with bit and save it on CY AND CY with inverted bit and save it on CY OR CY with bit and save it on CY OR CY with inverted bit and save it on CY

Single-bit Operations with CY

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

38

ROTATE INSTRUCTION AND DATA SERIALIZATION

Assume that bit P2.2 is used to control an outdoor light and bit P2.5 a light inside a building. Show how to turn on the outside light and turn off the inside one. Solution: SETB ORL MOV CLR ANL MOV C C,P2.2 P2.2,C C C,P2.5 P2.5,C ;CY = 1 ;CY = P2.2 ORed w/ CY ;turn it on if not on ;CY = 0 ;CY = P2.5 ANDed w/ CY ;turn it off if not off

Single-bit Operations with CY
(cont’)
Solution:

Write a program that finds the number of 1s in a given byte. MOV MOV MOV AGAIN: RLC JNC INC NEXT: DJNZ R1,#0 ;R1 keeps number of 1s R7,#8 ;counter, rotate 8 times A,#97H ;find number of 1s in 97H A ;rotate it thru CY NEXT ;check CY R1 ;if CY=1, inc count R7,AGAIN ;go thru 8 times

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

39

ROTATE INSTRUCTION AND DATA SERIALIZATION

SWAP A

It swaps the lower nibble and the higher nibble
In other words, the lower 4 bits are put into the higher 4 bits and the higher 4 bits are put into the lower 4 bits

SWAP

SWAP works only on the accumulator (A) before : after : D7-D4 D3-D0 D3-D0 D7-D4

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

40

ROTATE INSTRUCTION AND DATA SERIALIZATION

(a) Find the contents of register A in the following code. (b) In the absence of a SWAP instruction, how would you exchange the nibbles? Write a simple program to show the process. Solution: (a) MOV SWAP (b) MOV RL RL RL RL A,#72H A A A A ;A ;A ;A ;A ;A = = = = = 0111 0111 0111 0111 0111 0010 0010 0010 0010 0010 A,#72H A ;A = 72H ;A = 27H

SWAP
(cont’)

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

41

BCD AND ASCII APPLICATION PROGRAMS

ASCII code and BCD for digits 0 - 9
Key 0 1 2 3 4 5 6 7 8 9 ASCII (hex) 30 31 32 33 34 35 36 37 38 39 Binary 011 0000 011 0001 011 0010 011 0011 011 0100 011 0101 011 0110 011 0111 011 1000 011 1001 BCD (unpacked) 0000 0000 0000 0001 0000 0010 0000 0011 0000 0100 0000 0101 0000 0110 0000 0111 0000 1000 0000 1001

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

42

BCD AND ASCII APPLICATION PROGRAMS

The DS5000T microcontrollers have a real-time clock (RTC)
The RTC provides the time of day (hour, minute, second) and the date (year, month, day) continuously, regardless of whether the power is on or off

Packed BCD to ACSII Conversion

However this data is provided in packed BCD
To be displayed on an LCD or printed by the printer, it must be in ACSII format
Packed BCD 29H 0010 1001 Unpacked BCD 02H & 09H 0000 0010 & 0000 1001 ASCII 32H & 39H 0011 0010 & 0011 1001

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

43

BCD AND ASCII APPLICATION PROGRAMS

To convert ASCII to packed BCD
It is first converted to unpacked BCD (to get rid of the 3) Combined to make packed BCD key 4 7 ASCII 34 37 MOV MOV ANL ANL SWAP ORL Unpacked BCD 0000 0100 0000 0111 A, #’4’ R1,#’7’ A, #0FH R1,#0FH A A, R1 Packed BCD

ASCII to Packed BCD Conversion

0100 0111 or 47H

;A=34H, hex for ‘4’ ;R1=37H,hex for ‘7’ ;mask upper nibble (A=04) ;mask upper nibble (R1=07) ;A=40H ;A=47H, packed BCD

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

44

BCD AND ASCII APPLICATION PROGRAMS

Assume that register A has packed BCD, write a program to convert packed BCD to two ASCII numbers and place them in R2 and R6. MOV MOV ANL ORL MOV MOV data ANL RR RR RR RR ORL MOV A,#29H ;A=29H, packed BCD R2,A ;keep a copy of BCD data A,#0FH ;mask the upper nibble (A=09) A,#30H ;make it an ASCII, A=39H(‘9’) R6,A ;save it A,R2 ;A=29H, get the original A,#0F0H A A A A A,#30H R2,A ;mask the lower nibble ;rotate right ;rotate right SWAP A ;rotate right ;rotate right ;A=32H, ASCII char. ’2’ ;save ASCII char in R2

ASCII to Packed BCD Conversion
(cont’)

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

45

BCD AND ASCII APPLICATION PROGRAMS

Using a Lookup Table for ASCII

Assume that the lower three bits of P1 are connected to three switches. Write a program to send the following ASCII characters to P2 based on the status of the switches. 000 ‘0’ 001 ‘1’ 010 ‘2’ 011 ‘3’ 100 ‘4’ 101 ‘5’ 110 ‘6’ 111 ‘7’ Solution: MOV DPTR,#MYTABLE MOV A,P1 ;get SW status ANL A,#07H ;mask all but lower 3 MOVC A,@A+DPTR ;get data from table MOV P2,A ;display value SJMP $ ;stay here ;-----------------ORG 400H MYTABLE DB ‘0’,‘1’,‘2’,‘3’,‘4’,‘5’,‘6’,‘7’ END

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

46

BCD AND ASCII APPLICATION PROGRAMS

To ensure the integrity of the ROM contents, every system must perform the checksum calculation
The process of checksum will detect any corruption of the contents of ROM The checksum process uses what is called a checksum byte
The checksum byte is an extra byte that is tagged to the end of series of bytes of data

Checksum Byte in ROM

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

47

BCD AND ASCII APPLICATION PROGRAMS

To calculate the checksum byte of a series of bytes of data
Add the bytes together and drop the carries Take the 2’s complement of the total sum, and it becomes the last byte of the series

Checksum Byte in ROM
(cont’)

To perform the checksum operation, add all the bytes, including the checksum byte
The result must be zero If it is not zero, one or more bytes of data have been changed

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

48

BCD AND ASCII APPLICATION PROGRAMS

Assume that we have 4 bytes of hexadecimal data: 25H, 62H, 3FH, and 52H.(a) Find the checksum byte, (b) perform the checksum operation to ensure data integrity, and (c) if the second byte 62H has been changed to 22H, show how checksum detects the error. Solution: (a) Find the checksum byte. 25H The checksum is calculated by first adding the + 62H bytes. The sum is 118H, and dropping the carry, + 3FH we get 18H. The checksum byte is the 2’s + 52H complement of 18H, which is E8H 118H (b) Perform the checksum operation to ensure data integrity. 25H + 62H Adding the series of bytes including the checksum + 3FH byte must result in zero. This indicates that all the + 52H bytes are unchanged and no byte is corrupted. + E8H 200H (dropping the carries) (c) If the second byte 62H has been changed to 22H, show how checksum detects the error. 25H + 22H Adding the series of bytes including the checksum + 3FH byte shows that the result is not zero, which indicates + 52H that one or more bytes have been corrupted. + E8H 1C0H (dropping the carry, we get C0H) Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

Checksum Byte in ROM
(cont’)

HANEL

49

BCD AND ASCII APPLICATION PROGRAMS

Many ADC (analog-to-digital converter) chips provide output data in binary (hex)
To display the data on an LCD or PC screen, we need to convert it to ASCII
Convert 8-bit binary (hex) data to decimal digits, 000 – 255 Convert the decimal digits to ASCII digits, 30H – 39H

Binary (Hex) to ASCII Conversion

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

50

8051 PROGRAMMING IN C
The 8051 Microcontroller and Embedded Systems: Using Assembly and C
Mazidi, Mazidi and McKinlay

Chung-Ping Young 楊中平
Home Automation, Networking, and Entertainment Lab

Dept. of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

WHY PROGRAM 8051 IN C

Compilers produce hex files that is downloaded to ROM of microcontroller
The size of hex file is the main concern
Microcontrollers have limited on-chip ROM Code space for 8051 is limited to 64K bytes

C programming is less time consuming, but has larger hex file size The reasons for writing programs in C
It is easier and less time consuming to write in C than Assembly C is easier to modify and update You can use code available in function libraries C code is portable to other microcontroller with little of no modification
HANEL
Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN
2

DATA TYPES

A good understanding of C data types for 8051 can help programmers to create smaller hex files
Unsigned char Signed char Unsigned int Signed int Sbit (single bit) Bit and sfr

HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

3

DATA TYPES Unsigned char

The character data type is the most natural choice
8051 is an 8-bit microcontroller

Unsigned char is an 8-bit data type in the range of 0 – 255 (00 – FFH)
One of the most widely used data types for the 8051
Counter value ASCII characters

C compilers use the signed char as the default if we do not put the keyword

unsigned
HANEL

Department of Computer Science and Information Engineering National Cheng Kung University, TAIWAN

4

Write an 8051 C program to send values 00 – FF to port P1.

DATA TYPES Unsigned char
(cont’)

Solution:

1.

#include void main(void) 2. { unsigned char z; for (z=0;z

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