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Submitted By gameboy
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19-1.

Intrinsic temperature is reached when the intrinsic carrier density ni equals the lowest doping density in the pn juinction structure (the n-side in this problem). Thus È q Eg 1 1 ˘ Ï ¸ ni(Ti) = Nd = 1014 = 1010 exp Í - 2k ÌT - 300˝˙ Î Ó i ˛˚ Solving for Ti using Eg = 1.1 eV, k = 1.4x10-23 [1/°K] yields Ti = 262 °C or 535 °K.

19-2.

1 1 N-side resistivity rn = q m N = -19)(1500)(1014) = 43.5 ohm-cm (1.6x10 n d 1 1 P-side resistivity rp = q m N = = 0.013 ohm-cm p a (1.6x10-19)(500)(1018)

19-3.

Material is n-type with Nd = 1013 cm-3 >> ni = 1010 cm-3. Hence use approximate formulas given in Chapter 19. 2 ni n = Nd = 1013 cm-3 ; p = N d 1020 = 1013 = 107 cm-3

19-4.

po =

2 ni [300] Nd

; 2po =

2 ni [300 + T] Nd ; È q Eg Ï1 1 ¸˘ 2x1010 = 1010 exp Í - 2k ÌT - 300˝˙ Î ˚
Ó ˛

2 2 2 ni [300] = ni [300 + T]

q Eg 300 Solving for T yields T = (q E - k 300 ln(2)) = 305.2 °K g DT = 305.2 - 300 = 5.2 °K.

19-5.

q V1 I1 = Is exp( k T

q V1 + dV ; 10 I1 = Is exp( k T ) ;

kT dV = q ln(10) = 60 mV

19-6.

(a) xn(0) = depletion layer width on n-side at zero bias; xp(0) = depletion layer width on p-side at zero bias.

xn(0) + xp(0) = Wo =

2 e fc (Na + Nd) q Na Nd

(1)

È 1014 1015˘ k T È Na Nd˘ Í ˙ ˙ = 0.026 ln Í fc = q ln Í 2 ˙ Î 1020 ˚ = 0.54 eV Î ni ˚ Conservation of charge: q Na xp = q Nd xn (2)

Solving (1) and (2) simultaneously gives using the numerical values given in the problem statement gives: W o = 2.8 microns ; xn(0) = 2.55 microns ; xp(0) = 0.25 microns (b) Electric field profile triangular-shaped as shown in Fig. 19-9b. Maximum electric at zero bias given by 2 fc (2) (0.54) = 3,900 V/cm Emax = W = (2.8x10-4) o (c) From part a) fc = 0.54 eV (d) C(V) A = Wo C(0) A e V 1+f c ; C(V) = space-charge capacitance at reverse voltage V.

(11.7)(8.9x10-14) = = 3.7x10-9 F/cm2 2.8x10-4 (11.7)(8.9x10-14) C(50) = = 3.8x10-10 F/cm2 A 50 2.8x10-4 1 + 0.54

qV qV 0.7 (e) I = Is exp(kT ) ; exp( kT ) = exp (0.026 ) = 5x1011 È Dpt˘ ˙ 2 Í Dnt Is = q ni Í N t + N t ˙ A Î a d ˚ È ˘ Í (38)(10-6) (13)(10-6) ˙ 2 ˙ = (1.6x10-19)(1020) Í Î (1015)(10-6) + (1014)(10-6)˚ (2) I = (6.7x10-14 )(5x1011) = 34 mA

Is = 6.7x10-14 A ;

19-7.

rL L 0.02 Resistance R = A ; A = 0.01 = 2 cm-1 1 1 At 25 °C, Nd = 1014 >> ni so r = q m N = -19)(1500)(1014 ) n d (1.6x10 = 41.7 W-cm R(25 °C) = (41.7)(2) = 83.4 ohms È (1.6x10-19) (1.1) Ï 1 1 ¸˘ Ì At 250 °C (523 °K), ni[523] = 1010 exp Í - 300˝˙ = Î (2)(1.4x10-23) Ó523 ˛˚ (1010)(7.6x103) = 7.6x1013 which is an appreciable fraction of Nd = 1014. Thus we should solve Eqs. (19-2) and (19-3) exactly for no and po rather than using equations similiar to Eq. (19-4). Solving Eqs. (19-2) and (19-3) for Nd >> Na yields Nd È no = 2 Í1 + Î È 1014 Í no = 2 Í 1 + Î po = 2˘ 2 4 ni ni 1 + 2 ˙ and po = n . Putting in numerical values yields o Nd ˚ ˘ (4)(7.6x1013)2 ˙ ˙ = 1.4x1014 and 1+ 14)2 ˚ (10

5.8x1027 13 14 = 5.8x10 10

Assuming temperature-independent mobilities (not a valid assumption but no other information is given in text or the problem statement), resistance is R(250 °C) = r(250 ° C) L 1 ; r(250 °C) ≈ q m n + q m p A n o p o 1 = = 26.2 W-cm ; (1.6x10-19)(1500)(1.4x1014 ) + (1.6x10-19)(500)(5.8x1013 )

R(250 °C) ≈ (26.2)(2) = 52.4 ohms

19-8.

2 e (Na + Nd) EBD (11.7)(8.9x1014)(1015 + 1014)(3x105)2 BVBD = = 2 q Na Nd (2)(1.6x10-19)(1015)(1014) = 3,340 volts

19-9.

2 4 fc BVBD 2 2 Emax = EBD ≈ 2 W o fc

2 4 BVBD Wo ; Eq. (19-13); or f = 2 c EBD

2 2 4 BVBD W o BVBD Wo ; Eq. (19-11) ; Inserting f = and taking W 2(BVBD) = fc 2 c EBD 2 BVBD the square root yields W (BVBD) ≈ 2 EBD.

19-10.

Lp =

Dp t =

(13)(10-6) = 36 microns ; Ln =

Dn t =

(39)(10-6) = 62 microns

19-11.

Assume a one-sided step junction with Na >> Nd Dp t1 Dp t2 qV 2 qV 2 I1 = q ni A N t exp(k T ) ; I2 = q ni A N t exp(k T ) d 1 d 2 I2 I1 = 2 = t1 t2 ; Thus 4 t2 = t1

19-12.

2 ni 2 s = q mp p + q mn n ; np = ni ; Combining yeilds s = q mp n + q mn n 2 mp mn ni ds mn and p = ni mp dn = 0 = - q mp n2 + q mn ; Solving for n yields n = ni p = 1010 1500 10 -3 10 500 = 1.7x10 cm ; n = 10 500 9 -3 1500 = 6x10 cm ;

Thus minimum conductivity realized when silicon is slightly p-type. Inserting p and n back into the equation for conductivity yields smin = 2 q ni mp mn . Putting in numerical values smin = (2)(1.6x10-19)(1010) (500)(1500) = 2.8x10-6 mhos-cm

20-1. microns

1.3x1017 1.3x1017 = 2500 = 5x1013 cm-3 ; W(2500 V) = (10-5)(2500) = 250 Nd = BV BD

20-2.

Drift region length of 50 microns is much less than the 250 microns found in the previous problem (20-1) for the same drift region doping density. Hence this must be a punchthrough structure and Eq. (20-9) applies. -19 13 -3 2 5)(5x10-3) - (1.6x10 )(5x10 )(5x10 ) = 900 V BVBD = (2x10 (2)(11.7)(8.9x10-14)

20-3.

2 q A ni Lp kT È I˘ ; Von = Vj + Vdrift ; Vj = q ln Í I ˙ ; For one-sided step junction Is = N t Î s˚ d o (1.6x10-19)(2)(1010)2 (13)(2x10-6) Evaluating Is yields = 1.6x10-9 A 13)(2x10-6) (5x10 Vd = K1 I + K2 (I)2/3 Eq. (20-16) with I = forward bias current through the diode. Wd 5x10-3 K1 = q m A n = o b (1.6x10-19)(900)(2)(1017) 3 K2 = = 7.5x10-4 = 1.7x10-4

4 3 Wd (5x10-3)4 = 3 2 (1.6x10-19)2 (900)3 (1017)2 (2)2 (2x10-6) q2 mo nb A2 to

Von in volts 1.6 1.4 I 0A 1 10 100 1000 3000 Vj 0V 0.53 0.59 0.65 0.71 0.74 Vdrift 0V 0.001 0.005 0.033 0.25 0.67 Von 0V 0.53 0.59 0.68 0.96 1.41 1.2 1 0.8 0.6 0.4 0.2 0 1 10 100 1000 10000 Forward current in amperes • • • • •

20-4.

a)

L 1 Von(t) = Rdrift I(t) >> Vj ≈ 1 V ; Rdrift = r A ; r = q m N n d -3 L 5x10 1 = 2.5x10-3 r= -19)(1500)(5x1013) = 85 ohm-cm ; A = 2 (1.6x10 Rdrift = (85)(2.5x10-3) = 0.21 ohms ; I(t) = 2.5x108 t ; 0 < t < 4 microseconds

Von(t) = (0.21)(2.5x108 t ) = 5.3x107 t Volts ; 0 < t < 4 microseconds Von(4 ms) = (5.3x107)(4x10-6) = 212 volts b) Von(t) = Rdrift (t) I(t) ; Rdrift (t) = 0.21[1 - 2.5x107 t] Von(t) = {0.21[1 - 2.5x107 t]} { 2.5x108 t } = 53[t - 0.25 t2] ; t in microseconds

250

200 Von in volts No carrier injection

150

100

50 With carrier injection 0 0 0.5 1 1.5 2 2.5 3 3.5 4

20-5.

IF 2000 toff = trr + t3 = trr + di /dt = trr + = trr + 8 ms R 2.5x108 2 t IF -12 2 = 4x10-12(2000)2 = 16 ms trr = diR/dt ; t = 4x10 (BVBD) (2)(1.6x10-5)(2x103) = 16 ms ; toff = 8 ms + 16 ms = 24 ms 2.5x108

trr =

20-6.

Assume a non-punch-through structure for the Schottky diode. 1.3x1017 Nd = BV BD 1.3x1017 = 150 = 8.7x1014 cm-3

W d = 10-5 BVBD = (10-5) (150) = 15 microns

20-7.

Vdrift = (100 A) (Rdrift) = 2 V ; Rdrift = 0.02 ohms ; 0.02 = = 0.42 cm2 (1.6x10-19)(1500)(1015)(2x10-2) 2x10-3

1 L q mn Nd A

A =

20-8.

È 2e ˘ ˙ Use Eq. (20-9) to solve for Nd ; Nd = [EBD Wd - BVBD] Í 2˙ Í Î q Wd˚ -14 5)(2x10-3) - 300] (2)(11.7)(8.9x10 ) = N = 3.4x1014 cm-3 = [(2x10 d (1.6x10-19)(2x10-3)2

20-9.

W d(npt) R A npt = q mn Nnpt W d(pt) R = qm N A pt n pt ;

; Nnpt = Nd of non-punch-throuth (npt) diode

Npt = Nd of punch-through (pt) diode

e EBD W d(npt) = q N ; Derived from Eqs. (19-11), (19-12), and (19-13) npt e EBD W d(pt) = q N pt È Í + Í1 _ Î 2 q Npt BVBD˘ ˙ 1˙ 2 ˚ e EBD

q Npt Nnpt 2 BVBD q Nnpt 2 BVBD Npt 2 q Npt BVBD = eE = eE 2 BD Nnpt EBD BD EBD Nnpt e EBD Npt Npt 1 = W (npt) Wd(npt) N =x= N d npt npt 1 ; Wd(pt) = Wd(npt) x [ 1 _ 1 - x] +

If Npt > td,on and td,off Eon = (10)(300)(0.5)(5x10-5) = 1.25x10-3 Joules Erv = (0.5)(300)(10)(10-7) = 1.5x10-4 Joules Efi = (0.5)(300)(10)(9x10-9) = 1.5x10-5 Joules Pc = (1.95x10-3)(2x104) = 39 watts

22-3.

Use test conditons to estimate Cgd. Then estimate the switching times in the circuit with the 150 ohm load. Test circuit waveforms are shown below.

V V (t) G

GG t

VGS,Io V GS(th) V (t) GS t d,on t ri = t fv

V

GG t d,off t f i = tr v t

V (t) DS

i (t) D Io V d

t Equivalent circuit during voltage and current rise and fall intervals: RG + C gd R

D

V (t) G

C gs

V d

g (V - V ) GS(th) m GS Governing equation using Miller capacitance approximation:

vGS VG(t) dvGS + t = t ; t = RG [Cgs + Cgd{1 + gmRD}] ; dt During tri = tfv interval, VG(t) = VGG. Solution is Vd -t/t ; At t = t , V vGS(t) = VGG + {VGS(th) - VGG} e ri GS = VGS(th) + gmRD ; Solving for tri = tfv yields tri = tfv = t ln VGG - VGS(th) È ˘ Vd ˙ Í Î VGG - VGS(th) - gm RD˚

During trv = tfi, vG(t) = 0 and solution is vGS(t) = VGS,Io e-t/t . At t = trv, vGS(t) = VGS(th). Solving for trv yields Vd ˘ ÈV + g R Í GS(th) m D˙ Î ˚. VGS(th)

trv = t ln

Invert equation for tri to find Cgd. Result is 1 ¸Ï ¸ - RG CgsÔ ÌR (1 + g R )˝ Ó G m D˛

Cgd =

tri Ï Ô È VGG - VGS(th) ˘ Ì ln Í Vd ˙ Ô ÎV -V Ó GG GS(th) - gm RD˚

˝ Ô ˛

Ï ¸ ¸ 1 Ô 3x10-8 -9Ô Ï Cgd = Ì È - 5x10 ˝ Ì5(1 + 25)˝ = 2.3x10-9 F = 2.3 nF 15 - 4 ˘ Ó ˛ ˙ Ô ln Í Ô Ó Î 15 - 4 - 1˚ ˛ Solving for switching times in circuit with RD = 150 ohms. t = [10-9 + 2.3x10-9 {1 + 150}][100] = 35 ms È 15 - 4 ˘ È 4 + 2˘ ˙ tri = 3.5x10-5 ln Í 15 - 4 - 2˙ = 7 ms ; trv = 3.5x10-5 ln Í 4 ˚ Î ˚ Î = 14 ms

22-4.

Waveforms for vDS(t) and iD(t) shown in previous problem. Power dissipation in MOSFET given by 1 T = [Eon + Esw] fs ; fs = T ; Eon = [ID]2 rDS,on(Tj) 2 ;

Vd È Tj - 25˘ È Tj ˘ 300 Í ˙ Í ˙ ID = R = 150 = 2 A ; rDS,on(Tj) = 2 Î 1 + 150 ˚ = 2 Î 0.833 + 150˚ D È Tj ˘ 1 1 Í ˙ Eon = (4)(2) Î 0.833 + 150˚ 2f = {3.32 + 0.027 Tj} f s s tri 1 Û t t Esw = T ÙVd ID(1 - t )(t )dt + ı ri ri 0 Esw = tfi V I 1 Û ÙV I (1 - t )( t )dt = d D [t + t ] T ı d D 6 tfi tfi ri fi 0

(300)(2) [7x10-6 + 14x10-6] = 2.1x10-3 joules 6

1 = {3.32 + 0.027 Tj} f fs + 2.1x10-3 fs s = {3.32 + 0.027 Tj} +[ 2.1x10-3][104] = 24.3 + 0.027 Tj PMOSFET 30 25 20 Watts 15 10 5 0 0 10 20 30 40 50 60 70 80 90 100 Temperature [ °K] B B B B B

22-5.

Von = on-state voltage of three MOSFETs in parallel = Io reff

r1 r2 r3 reff = r r + r r + r r ; r1 etc. = on-state resistance of MOSFET #1 etc. 1 2 2 3 3 1 È Tj - 25˘ Í ˙ r1(Tj) = r1(25 °C) Î 1 + 0.8 100 ˚ ; r1(105 °C) = (1.64) r1(25 °C) etc. r1(105 °C) = 2.95 W ; r2(105 °C) = 3.28 W ; r3(105 °C) = 3.61 W (2.95)(3.28)(3.61) reff(105 °C) = [(2.95)(3.28) + (3.28)(3.61) + (3.61)(2.95)] = 1.09 ohms Von2 Io2 reff2 For the ith MOSFET, Pi = 2 r = 2 r ; Assume a 50% duty cycle and ignore i i switching losses. (5)2(1.09)2 (5)2(1.09)2 (5)2(1.09)2 P1 = (2)(2.95) = 5 W ; P2 = (2)(3.28) = 4.5 W ; P3 = (2)(3.61) = 4.1 W

22-6.

Hybrid switch would combine the low on-state losses of the BJT and the faster switching of the MOSFET. In order to obtain these advantages, The MOSFET would be turned on before the BJT and turned off after the BJT. The waveforms shown below indicate the relative timing. The switch blocks Vd volts in the off-state and conducts Io amps in the on-state.

VDS,on

V CE,on

v =v CE DS r I o; r < 1 iD Io

i

(1 - r)I o C

v

GS

v

BE

22-7.

1.3x1017 BVDSS ≈ N = 750 volts ; Ndrift = 1.7x1014 cm-3 drift -5)(750) = 75 microns ; W drift ≈ (10 W d,body = protrusion of drain depletion layer into body region W drift Ndrift (75)(1.7x1014) ≈ = ≈ 0.3 microns Nbody 5x1016 Even though body-source junction is shorted, there is a depletion layer associated with it which is contained entirely on the body side of the junction. This must be included in the estimate of the required length of the body region. 2 e fc k T È Na Nd˘ Í ˙ q Na,body ; fc = q ln Í n 2 ˙ ; Î i ˚

W s,body ≈

È (1019)(5x1016)˘ ˙ = 0.94 fc = 0.026 ln Í 20) Î ˚ (10 W s,body ≈ (2)(11.7)(8.9x10-14)(0.94) ≈ 0.16 microns (1.6x10-19)(5x1016)

In order to avoid reach-through , Wbody > Wd,body + Ws,body = 0.3 + 0.16 = 0.46 microns

22-8.

Displacement current = Cgd

dvDS dvGD ≈ Cgd dt ; vDS ≈ vGD>> vGS dt

dvDS BJT will turn on if Rbody Cgd dt = 0.7 V dvDS 0.7 dt > Rbody Cgd will turn on the BJT.

22-9.

VGS,max = (0.67) EBD tox = (0.67) (5x106) (5x10-6) = 16.7 volts

22-10.

a) iD =

mn Cox N Wcell (vGS - VGS(th)) 2L

e (11.7)(8.9x10-14) Cox = t = = 1.04x10-7 F/cm2 10-5 ox 2 iD L N=m C W n ox cell (vGS - VGS(th)) (2)(100)(10-4) ≈ 5,800 cells N = (1500)(1.04x10-7)(2x10-3)(15 - 4) 100 b) Icell = 5800 = 17 milliamps

22-11.

Von = 4 volts = Ion Ron = (10 A) Ron ; Ron = 0.4 ohms W drift Ron = q m N A n d : Wdrift = 10-5 BVDSS = (10-5)(800) = 80 microns

1.3x1017 Nd = BV DSS A=

=

1.3x1017 800

≈ 1.6x1014 cm-3

8x10-3 ≈ 0.5 cm2 (1.6x10-19)(1500)(1.6x1014)(0.4)

10 A A A = 20 2 BVDSS = 150 V Check for excessive power dissipation. Pallowed = Tj,max - Ta 150 - 50 = = 100 watts ; Pdissipated = [Eon + Esw] fs 1 Rq,j-a

Io2 rDS(on) (100)2(0.01) = = 50 watts Eonfs = 2 2 Esw = Vd Io (100)(100) [(2)(5x10-8) + (2)(2x10-7)] 2 [tri + tfi + trv +tfv] = 2

Esw = 2.5x10-3 joules ; Eswfs = (2.5x10-3)(3x104) = 75 watts Pdissipated = 50 + 75 = 125 watts > Pallowed = 100 watts MOSFET overstressed by both overvoltages and excessive power dissipation.

22-14.

Gate current which charges/discharges Cgs and Cgd during turn-on and turn-off is approximately constant during the four time intervals. However during the current rise and fall times the voltages VGS and VGD change by only a few tens of volts. However during the voltage rise and fall times VGD changes by approximately Vd which is much larger than a few tens of volts. Thus we have:

VGG Current rise/fall times proportional to [Cgs + Cgd] I G Vd Voltage rise/fall times proportional to Cgd I G Cgs roughly the same size as Cgd and Vd >> VGG Hence voltage switching times much greater than current switching times.

23-1.

vs(t) ; a < wt < p vs(t) = 2 Vs sin(wt) ; iL(t) = R L p 1 Û = 2p ı[(1)iL(wt) + {iL(wt)}2Ron] d(wt) a Vs sin(2a) 1 È Vs ˘ 2 {1 + cos(a)} + π Í R ˙ Ron [π - a + = 2 ] Î L˚ 2 pRL

23-2.

Tj,max - Ta,max 120 °F = 49 °C ; Tj,max = 125 °C ; |max = Rqja |max = 125 - 49 = 760 Watts 0.1

Check at a = 0

1 È 220˘ 2 sin(0) 220 [1 + cos(0)] + π Í 1 ˙ (2x10-3)[π - 0 + 2 ] = 107 watts = Î ˚ 2π (1) = 107 watts less than the allowable 760 watts. Hence trigger angle of zero where maximum load power is delivered is permissible. π 1 Û Average load power = 2π ı{iL(wt)}2RL d(wt) ; iL(wt) = 2 (220) sin(wt) a π 2 sin(2a) 1 Û ı{ 2 (220)}2sin2(wt) d(wt) = (220) [3.14 - a + = 2π ] 6.28 2 a For a = 0 = 24.2 kW

23-3.

PSCR(t) = instantaneous power dissipated in the SCR during turn-on. t dI PSCR(t) = vAK(t) iA(t) = VAK {1 - t } dt t during tf f P(t) = power density = PSCR(t) = watts per cm2 ; A(t) = conducting area of SCR A(t)

A(t) = π [ro + us t]2 - π ro2 = π [2 ro us t + (us t)2]

Û V {1 - tt } dI t tf f dt 1 Ù AK 1 Û ıP(t) dt = C dt dTj = C v ıπ [2 ro us t + (us t)2] v 0 0
1 VAK dI dTj = C 2πr u dt o s v

tf

Û È 1 - tt ˘ ÙÍ f ˙ ust ˙ dt ÙÍ ı Î 1 + 2ro˚

tf

us -1 ; Let a = a' = 1, b = t , and b' = 2r f o

0 tf Û Ù È a + bt ˘ Integral becomes ı Í a' + b't˙ dt ; Using integral tables Î ˚ 0 tf bt Û È a + bt ˘ ÙÍ ˙ dt = f + [ab' - ab] ln[a' + b' t ] ; ı Î a' + b't˚ b' f [b']2 0 1 b= 2x10-5 4 4 sec-1 ; b' = 10 = - 5x10 (2)(0.5) = 104 sec-1

Evaluating the integral yields tf È 4˘ Û È a + bt ˘ ÙÍ ˙ dt = -1 + Í 10-4 + 5x10 ˙ ln[1 + (104)(2x10-5)] = 9.4x10-6 sec ı Î a' + b't˚ Î 104 108 ˚ 0 With Cv = 1.75 Joule/(°C-cm3), the expression for dTj becomes (103)( 9.4x10-6) dI dI dTj = 4)(0.5) dt = 125 - 25 = 100 °C ; Solving for dt yields (2π)(1.75)(10 dI 100 dt = 1.7x10-7 = 590 A/ms

23-4.

Advantages - Shorter N- region length Wd means shorter carrier lifetimes can be accomodated and thus faster switching times. Disadvantages - Junction J1 is now a P+ - N+ junction with a low breakdown voltage. Since J3 already has a low breakdown voltage, the modified thyristor has no significant reverse blocking capability.

23-5.

ton =

(4 - 0.5) cm us

=

3.5 = 350 microseconds 104

23-6.

Lateral voltage drops caused by base currents cause current density nonuniformities. At large currents, these nonuniformities become severe and the increasing possibility of second breakdown limit the total current that the BJT can safely conduct. In the thyristor, no significant gate current is needed to keep the thyristor on and there is consequently no lateral current flow and thus lateral voltage drop. The current density is uniform across the entire cross-sectional area of the thyristor and there is much less likelyhood of second breakdown.

23-7.

a) Breakover in a thyristor is not due to impact ionization. However in a well-designed thyristor, the value of the breakover voltage is an appreciable fraction of the actual avalanche breakdown voltage. Thus an estimate of the n1 thickness and doping level based avalanche breakdown would be a reasonable first attempt. Nd = 1.3x1017 13 -3 -5 3 3 = 6.5x10 cm ; Wd ≈ (10 )(2x10 ) = 200 microns 2x10

qWd2 (1.6x10-19)(2x10-2)2 b) t = kT(m + m ) = = 17 microseconds (1.4x10-23)(300)(900) n p Used (mn + m p) = 900 cm2/V-sec which is value appropriate to large excess carrier densities (approaching 1017 cm-3) c) Von = I Rdrift ; Ignore I2/3 contribution as it is usually small compared to the linear term. Wd 2 0.02 Rdrift ≈ q (m + m ) n A ; 2000 = 10-3 = -19)(900)(1017) A ; (1.6x10 n p b Solving for A gives A = 0.02 2 -19)(900)(1017)(10-3) = 1.4 cm (1.6x10

2000 Resulting current density is 1.4 = 1430 A/cm2 which is excessively large. Probably should use nb ≈ 1016 cm-3 which would give a current density of 140 A/cm2, a more realistic value.

23-8.

15 3000 Cathode area = 200 = 15 cm2 = 0.65 Asi ; Asi = 0.65 = 23 cm2 23 cm2 = π Rsi2 ; Rsi = 23 π = 2.7 cm

23-9.

dvAK IBO ≈ C (0) ; Cj2(0) = zero bias value of junction J2 space charge capacitance dt max j2

|

eA Cj2(0) ≈ W depl(0)

; Wdepl(0) ≈

2 e fj2 q Nd

NaNd kT ; fj2 = q ln[ 2 ] ni

(1014)(1017) fj2 = 0.026 ln[ ] = 0.66 V ; (1020)

W depl(0) ≈

(2)(11.7)(8.9x10-14)(0.66) = 2.9 microns (1.6x10-19)(1014)

Cj2(0) =

(11.7)(8.9x10-14)(10) = 36 nF 2.9x10-4

dvAK 0.05 6 dt max = 3.6x10-8 = 1.4x10 V/sec or 1.4 V per microsecond

|

24-1. Gate

Cross-sectional view of GTO gate-cathode area with reverse gate current flowing.

Cathode -i N 2 R + vGK t G

R P 2 v GK +

Center Line The negative gate current, -iG, flowing through the P2 layher beneath the N2 cathode layer develops a lateral voltage drop vGK as indicated. Maximum negative vGK = BVJ3 BVJ3 |vGK| = |IG,max| RGK < BVJ3 in order to avoid breakdown or IG,max < R GK r p2 W R RGK = 2 N = 4 N L t ; N = number of cathode islands in parallel. BVJ3 IG,max = R GK IA,max = IA,max b off : Solving for IA,max yields

=

4 N L t boff BVJ3 r p2 W

24-2.

Assume that the current is communtated from the GTO to the turn-off snubber and associated stray inductance linearly as a function of time. That is the inductor current

t iLs = Io t ; Assume that just prior to the end of the current fall time interval, the fi voltage across the snubber capacitor has built up to approximately Vd. diLs Io vAK,max = 1.5 Vd = Ls dt + vcap = Ls t + Vd ; Solving for Ls yields fi Vd tfi Ls = 2 I o

24-3.

Equivalent circuit during tgq shown below. P i (t) G L G V GG+ N P N

J3 forward biased during t gq

- VGGIo diG LG dt = - VGG- ; iG(t) = L t ; At t = tgq want iG = - b ; Solve for LG off G LG = b off VGG- tgq Io = (5)(15)(5x10-6) (500) = 0.75 microhenries

Equivalent circuit during tw2 interval.

i (t) G L G + BV J3

V GG+

Io Io BVJ3 - VGGdiG LG dt = BVJ3 - VGG- ; iG(0) = - b ; iG(t) = - b + t LG off off At t = tw2 , iG = 0 ; solving for tw2 yields Io LG tw2 = b [BV - V off J3 GG-] (500)(7.5x10-7) = = 7.5 microseconds (5)(25 - 15)

25-1.

Ron(MOS) 1 proprotional to m ; mn = 3 mp ; Hence A majority Ron(n-channel) Ron(p-channel) = 3 A A Ron(IGBT) 1 proportional to dn(m + m ) ; dn = excess carrier density A n p dn = dp so p-channel IGBTs have the same Ron as n-channel IGBTs

25-2.

Turn-off waveforms of short versus long lifetime IGBTs i

D long lifetime

I I

(long) BJT (short) BJT

short lifetime

t

Long lifetime IGBT a. BJT portion of the device has a larger beta and thus the BJT section carries the largest fraction of the IGBT current. Thus IBJT(long) > IBJT(short). b. Longer lifetime leads to longer BJT turn-off times. Short lifetime IGBT a. BJT beta smaller. MOSFET section of the device carries most of the current. b. Shorter lifetime means less stored charge in the BJT section and thus faster turn-off.

25-3. Collector junction of pnp BJT section of IGBT Body region of MOSFET section of IGBT

Base of pnp BJT Emitter of pnp BJT

P

NV V DS1 >V

P

+ Drain of IGBT

DS2

DS1

Effective base width Significant encroachment intoa the base of the PNP BJT section by the depletion layer of the blocking junction. The effective base width is thus lowered and the beta increases as vDS increases. This is base width modulation and it results in a lower output resistance ro (steeper slope in the active region of the iD-vDS characteristics). Depletion layer

Collector junction of pnp BJT section of IGBT Body region of MOSFET section of IGBT

Base of pnp BJT Emitter of pnp BJT

P

NV DS

N

+

P

+ Drain of IGBT

Depletion layer

Effective base width independent of V DS

Depletion encroaches into the N- layer but the advance is halted at moderate vDS values by the N+ buffer layer. The PNP base width becomes constant and so the effective resistance ro remains large.

25-4.

One dimensional model of n-channel IGBT 25 m m

Source N

+

P 17 10

N 14 10

N+ 19 10

P

+ Drain

19 10

19 10

Reverse blocking junction is the P+ - N+ junction because of body-source short. BVRB ≈ 1.3x1017 < 1 volt. No reverse blocking capability. 1019

Forward breakdown - limited by P - N- junction.

1.3x1017 BVFB = ≈ 1300 volts ; But Wdepl(1300 V) = (10-5)(1300) = 130 microns 14 10 130 microns > 25 micron drift region length. Hence forward blocking limited by punch-through. (1.6x10-19)(1014)(2.5x10-3)2 = 453 volts BVFB = (2x105)(2.5x10-3) (2)(11.7)(8.9x10-14)

25-5.

IGBT current - Ion,IGBT

; Von(IGBT) = Vj + Ion,IGBT Ron,IGBT

Assume Vj ≈ 0.8 V ; Exact value not critical to an approximate estimate of Ion,IGBT. Ion,IGBT ≈ 3 - 0.8 Ron,IGBT Wd ; Ron,IGBT ≈ q (m + m ) n A n p b

7.5x10-3 -3 -5)(750) = 75 mm ; R W d = (10 on,IGBT = (1.6x10-19)(900)(1016)(2) = 2.6x10 W 2.2 Ion,IGBT ≈ ≈ 850 amps 2.6x10-3 MOSFET current - Ion,MOS ; Von(MOS) = Ion,MOS Ron,MOS Ion,MOS = Von(MOS) Ron,MOS ; Ron,MOS = Wd q mn Nd A ; Wd = 75 mm

Nd =

1.3x1017 = 1.7x1014 cm-3 750

7.5x10-3 Ron,MOS = = 0.09 ohms (1.6x10-19)(1.5x103)(1.7x1014)(2) 3 Ion,MOS = 0.09 = 33 amps

25-6.

Von(PT) = Vj,PT + Ion,PT Ron,PT = Vj,NPT + Ion,NPT Ron,NPT Ion,PT Ion,NPT Ron,NPT Ron,PT since Vj,NPT ≈ Vj,PT



Ron,NPT W d,NPT = W ≈ 2 assuming doping level in PT drift region is much less than Ron,PT d,PT the doping level in the NPT drift region. Ion,PT Hence I on,NPT ≈ 2

25-7.

P Cv dT = dQ ; dQ = V dt ; P = power dissipated in IGBT during overcurrent transient. V = volume in IGBT where power is dissipated.Duration of transient = dt. P = Iov2 Ron ; Iov = V Cv dT dt Ron ; V ≈ A Wdrift q (mn + m p) nb A2 Cv dT dt

W drift Ron = q (m + m ) n A ; Iov = n p b

Iov =

(1.6x10-19)(900)(1016)(0.5)2(1.75)(100) ≈ 2.5x103 amps -5) (10

Estimate is overly optimistic because it ignores any other ohmic losses in the device such as channel resistance or resistance of the heavily doped source and drain diffusions. However IGBTs nominally rated at 100 A have repeatedly been tested at 1000 A for 10 microseconds or less and survived.

25-8.

The IGBT has the smaller values of Cgd and Cgs because its effective cross-sectional area is smaller than that of the MOSFET. The IGBT has a smaller area even though its current rating is identical to the MOSFET's rating because the IGBT utilizes conductivity modulation of the drift region to significantly reduce the specific on-state resistance.

25-9.

dvDS Vd dvDS = t ; trv < 0.75 microseconds Check dt at turn-off ; dt rv Vd dvDS > t dt off = 700 = 2330 V/ms > 800 V/ms limit. 3x10-7

dvDS Device is overstressed by an overly large dt .

tri + trv + tfi + tfv Check switching losses Psw = Vd Io fs 2 (3x10-7 + 7.5x10-7) (2.5x104) = 875 W Psw = (700)(100) 2 Tj,max - Ta 150 - 25 Allowable power loss = = = 250 watts Rqja 0.5 Switching losses exceed allowable losses. Module is overstressed by too much power dissipation.

26-1.

Equivalent circuit for JFET in active region.

+ v GS C GS

C GD + -

ro mv GS

+ v DS -

Equivelent circuit for JFET in the blocking state. i + v GS D

Linearized I-V characteristics

0 C GD C GS + v DS

-V

GS1

-V

GS2

0 V DS1 V DS2

26-2.

Drive circuit configuration V DD

MOSFET off V R VDS = VKG = - VGK = RDD R 2 1+ 2 Negative enough to insure that the FCT is off. MOSFET on

R1 R 2 + V drive -

RL

VDS = VKG = - VGK = 0 and FCT is on.

MOSFET characteirstics: - High current sinking capability - Low Ron ; Low BVDss

26-3.

Wd2 EBD Wd Vdrift = (m + m ) t ; BVBD = ; Vdrift,GaAs = Vdrift,Si 2 n p Wd2(Si) (mn + mp)|Si tSi = Wd2(GaAs) (mn + mp)|GaAs tGaAs

(mn + mp)|Si È EBD(Si) ˘ 2 tGaA Í ˙ tSi = (mn + mp)|GaAs ÎE (GaAs)˚ BD (mn + mp)|Si = 2000 cm2/V-sec ; (m n + mp)|GaAs = 9000 cm2/V-sec EBD(Si) = 300 kV/cm tGaA tSi ; EBD(GaAs) = 400 kV/cm

2 È3˘ 2 = 9 Í4˙ = 0.125 ; GaAs has the shorter lifetime. Î ˚

26-4.

EBD = 107 V/cm ; BVBD = EBD tox 103 = 10-4 cm = 1 micron tox = 107

26-5.

IA,max = (105)(1.5x10-2) = 1500 amperes

26-6.

P-MCT fabricated in silicon can turn-off three times more current than an identical N-MCT due to the difference between the mobilities in the n-channel OFF-FET in the P-MCT and p-channel OFF-FET in the N-MCT. Hence IA,max = (3)(105)(1.5x10-2) = 4500 amperes

26-7.

Assume an n-type drift region since m n > mp.

Wd Rdrift = q m N A n d

Wd ; Rdrift,sp = Rdrift A = q m N n d e EBD2 2 BVBD EBD

Using Eq. (20-1) Nd = 2 q BV BD

; Using Eq. (20-3) Wd =

Substituting into the expression for Rdrift,sp yields 2 BVBD 1 2 q BVBD Rdrift,sp = E BD q e e EBD2 4 (BVBD)2 = e mn (EBD)3

26-8.

(4)(500)2 2 Silicon : Rdrift,sp = -14)(3x105)3 = 0.024 ohms-cm (11.7)(1500)(8.9x10 GaAs: Rdrift,sp = (4)(500)2 2 -14)(4x105)3 = 0.0016 ohms-cm (12.8)(8500)(8.9x10 (4)(500)2 = 2.3x10-4 ohms-cm2 (10)(600)(8.9x10-14)(2x106)3

6H-SiC: Rdrift,sp =

(4)(500)2 Diamond: Rdrift,sp = = 9.3x10-7 ohms-cm2 (5.5)(2200)(8.9x10-14)(107)3

26-9.

Diamond is the most suitable material for high temperature operation. It has the largest bandgap (by almost a factor of two) and thus the smallest intrinsic carrier density at any given temperature. This statement presumes that the phase change listed for diamond in the table of material properties exceeds the sublimation temperature of SiC (1800 °C).

26-10.

Eq. (20-1): Nd = 2 q BV BD 5.7x1017 (12.8)(8.9x10-14)(4x105)2 = BV For GaAs: Nd = BD (2)(1.6x10-19)(BVBD) (10)(8.9x10-14)(2x106)2 1.1x1019 For 6H-SiC: Nd = = BV (2)(1.6x10-19)(BVBD) BD

e EBD2

For diamond: Nd =

(5.5)(8.9x10-14)(107)2 1.5x1020 = BV (2)(1.6x10-19)(BVBD) BD

Eq. (20-3): Wd =

2 BVBD EBD 2 BVBD = 5x10-6 BVBD [cm] 4x105 [cm]

For GaAs: Wd =

2 BVBD = 10-6 BVBD For 6H-SiC: Wd = 2x106

2 BVBD = 2x10-7 BVBD For diamond: Wd = 7 10

[cm]

26-11.

Use equations from problem 26-10. Material GaAs 6H-SiC Diamond Nd 2.9x1015 cm-3 5.5x1016 cm-3 7.5x1017 cm-3 Wd 10-2 cm 2x10-3 cm 4x10-5 cm

26-12.

Tj = Rqjc Pdiode + Tcase : Rqjc = C.• (k) -1 k = thermal conductivity and C = constant Using silicon diode data: C = (Tj - Tcase) k Pdiode = (150 - 50)( 1.5) = 0.75 cm-1 200

0.75 0.75 Rqjc(GaAs) = 0.5 = 1.5 °C/W : R qjc(SiC) = 5 = 0.15°C/W 0.75 Rqjc(diamond) = 20 = 0.038°C/W Tj(GaAs) = (1.5)(200) + 50 = 350 °C : Tj(SiC) = (0.15)(200) + 50 = 80 °C

Tj(diamond) = (0.038)(200) + 50 = 57.4 °C

26-13.

Pinch-off of the channel occurs when the depletion region of the gate-channel (P+N-) junction is equal to W/2 where W is the width of the channel. Occurs at a gate-source voltage of -Vp. The other half of the channel is depleted by the depletion region from the gate-channel junction on the other side of the channel. See Figs. 26-1 and 26-3. W 2 = Wo Vp 1+ f c ÈNa Nd˘ kT Í ˙ fc = q ln Í 2 ˙ Î ni ˚ È W ˘ 2 fc Í2 W ˙ - fc Î o˚ 2 e fc q Nd

;

;

Wo =

Solving for Vp yields Vp =

È(1019)(2x1014)˘ ˙ = 0.8 V fc = 0.026 ln Í Î ˚ 1010 (2)(11.7)(8.9x10-14)(0.8) (1.6x10-19)(2x1014)

Wo =

= 2.3 microns

È 10 ˘ 2 Vp = (0.8) Í(2)(2.3)˙ - 0.8 = 3.8 - 0.8 = 3 V Î ˚

26-14.

Single cell of the multi-cell JFET shown below. See Fig. 26-1 for a fuller picture of the multi-cell nature of the JFET. The diagram on the left indicates the various contributions to the on-state resistance and the figure on the right shows the various geometrical factors that determine the resistance. Each cell is d centimeters deep in the direction perpendicular to the plane (page) of the diagram. The gate-source voltage is set at zero.

source

Rs P + Rc R t P +

W g

W

l gs

P

+

W - 2W o Wo + W /2 g

P

+

lc

l gd - W o - W g /2

R

W + Wg

d

Rs

drain lgs 10-3 =qm N dW = = 298 ohms n d (1.6x10-19)(1500)(2x1014)(0.07)(10-3) lc = q m N d (W - 2W ) n d o 10-3 = 552 ohms = (1.6x10-19)(1500)(2x1014)(0.07)(10-3 - 4.6x10-4)

Rc

Rt estimate. Treat the region of thickness Wo + Wg/2 as though it has an average width (W - 2 Wo) + (W + Wg) given by = W + Wg/2 - Wo. Rt now approximately given by 2 Rt Rt Wo + Wg/2 = q m N d (W + W /2 - W ) n d g o (10-3 + 5x10-4) = 351 ohms = (1.6x10-19)(1500)(2x1014)(0.07)(10-3 + 5x10-4 - 2.3x10-4)

(lgd - Wo -Wg/2) Rd = q m N d (W + W ) = n d g -4 - 2.3x10-4 - 5x10-4) (35x10 = 412 ohms Rd = (1.6x10-19)(1500)(2x1014)(0.07)(10-3 +10-3) Total resistance of a single cell is Rcell = Rs + Rc + Rt + Rd

Rcell = 298 + 552 + 351 + 412 = 1613 ohms There are N = 28 cells in parallel so the the net on-state resistance is Ron = Rcell 1613 = 28 = 58 ohms N

26-15.

As the drain-source voltage increases, the reverse-bias on the gate-drain pn junction increases. The depletion region of the two adjacent P+ regions merge and then grow towards the drain. The drift region of length lgd and doping Nd must contain this depletion region and will determine the breakdown voltage. The short length of the drift region suggests that punch-through will limit the breakdown voltage. Check for this possibility first. Non-punch-through estimate: BV = 1.3x1017 = 650 V ; Wd > (10-5)(6.5x102) = 65 microns > 35 microns 2x1014

Hence this is a punch-through structure. Use Eq. (21-21) and EBD = 2x105 V/cm (1.6x10-19)(2x1014)(3.5x10-3)2 BV = (2x105)(3.5x10-3) (2)(11.7)(8.9x10-14) BV = 511 V = 700 - 189

27-1.

a.

During turn-off of the GTO, Io communtates linearly to Cs. dvC dvC dvAK Io t t Cs dt = Io t ; dt = = C t < 5x107 V/s dt fi s fi Maximum dvAK occurs at tfi. Solving for Cs yields dt 500 5x107 = 10 microfarads

Cs >

È dvAK˘ -1 Í ˙ Io Î dt ˚ =

Rs chosen on basis of limiting discharge current from Cs to safe level when GTO turns on. ICs,max = IAM - Io - Irr . Assume irr = 0.2 Io. Then ICs,max = 1000 - 500 -100 = 400 A 500 Rs = 400 ≈ 1.3 ohms Snubber recovery time = 2.3 Rs Cs = (2.3)(10-5)(1.3) = 30 microseconds. fsw Cs Vd2 Power dissipated in snubber PRs ≈ 2 PRs = (0.5)(103)(10-5)(500)2 = 1.25 kW

b.

27-2.

diA 500 L s dt max = Vd ; Ls ≈ ≈ 1.7 microhenries. 3x108 Voltage across GTO at turn-off = Vd + Io Rs : Assume Io Rs = 0.2 Vd Rs = (0.2)(500) = 0.2 ohms. (500)

27-3.

vCs(t) = Vd - Vd cos(wot) + Vd

Cbase Cs sin(wot) = Vd + K sin(wot - f)

vCs,max = Vd + K ; K sin(wot - f) = K sin(wot) cos(f) - Kcos(wot) sin(f)

K sin(wot) cos(f) - K cos(wot) sin(f) = Vd Cbase Cs

Cbase Cs sin(wot) - Vd cos(wot)

K cos(f) = Vd

and K sin(f) = Vd ;

C 2 + K sin(f) 2 = K2 = V 2 base + V 2 [ K cos(f)] [ ] d Cs d Cbase 1+ C s

vCs,max = Vd + K = Vd + Vd

27-4.

a.

Equivalent circuit after diode reverse recovery. L = 10 mH + 200 V Rs Cs

i

L

diR iL(0+) = Irr ; During reverse recovery L dt = 200 V diR Irr 200 7 7 -7 dt = trr = 10-5 = 2x10 A/sec ; Irr = (2x10 )(3x10 ) = 6 A Cbase 1+ C s

b.

vCs,max = 500 V = 200 + 200

Cbase Cbase 1+ C = 1.5 ; C = 1.5 ≈ 1.25 s s È 2 ˘ -5) Í 6 ˙ = 9 nF Cbase = (10 Î (200)2˚ 9 nF Cs = 1.25 ≈ 7 nF

27-5.

Use the circuit shown in problem 27-4. È 62 ˘ ˙ Cs = Cbase = (10-5) Í Î(200)2˚ = 9 nF È200˘ Rs = 1.3 Rbase = (1.3) Í 6 ˙ = 43 ohms Î ˚ vCs,max = (1.5)(200) = 300 V

27-6.

ÈL I 2 + C V 2˘ Í s rr s in ˙ ˚ f P = WR fsw = Î 2 sw WR = (0.5)(10-5)(6)2 + (0.5)(9x10-9)(200)2 = 3.6x10-4 Joules P = WR fsw = (3.6x10-4 )(2x104) = 7.2 watts

27-7.

a.

BJT waveforms (trv assumed to be zero for Cs = 0) i Cs

Io 0 v CE Cs = 0 Cs > 0 0 V d t tfi t

Power dissipation for Cs = 0 is Pc =

Vd Io tfi fsw 2

Pc =

(200)(25)(4x10-7) (2x104) = 20 W 2

Power dissipation for Cs = Cs1 tfi Û Io t2 Vd Io tfi t Ù Pc = Wc fsw ; Wc = ıIo(1 - t ) 2 C t d t = 12 s1 fi fi 0 (200)(25)(4x10-7)(2x104) = 3.3 watts Pc = 12 Factor of six reduction in the turn-off losses. BJT losses increase at turn-on only becaue of energy stored in Cs being dissipated in the BJT, but also because the time to complete turn-on is extended as shown in Fig. 27-14a. This extended duration of traversal of the active region also increases the turn-on losses. During the turn-on interval, the collector-emitter voltage is given by (assuming that the external circuit dominates the transient) diC diC t2 dvCE Cs1 dt = - dt t - Irr ; vCE(t) = Vd - dt 2 C s1 t - Irr C s1 b.

Seting the expression for vCE(t) equal to zero and solving for the time DT = t2 - (tri + trr) (see Fig. 27-14a) required for vCE to reach zero yields Irr DT = - di /dt + C È Irr ˘2 2 Vd Cs1 Í ˙ Î diC/dt˚ + diC/dt

Note that DT = 0 if Cs1 = 0 which is consistent with the assumption that the external circuit and not the BJT that dominates the turn-on transient. Extra energy disspated in the BJT at turn-on due to Cs1 is thus ÈVd diC [Io + Irr] Irr˘ DT 2 ˙ ÛvCE(t) iC(t) dt = Vd Irr DT + Í 2 dt ı 2 Cs1 ˚ DT Î 0 4 (Io + 3 Irr) diC Èdi ˘ 2 3 - Í C˙ DT Î dt ˚ 8 C 2 Cs1 dt DT s1

ÈDT ˘ The increase in the BJT loss is Í ÛvCE(t) iC(t) dt˙ fs where fs is the switching Íı ˙ Î0 ˚ frequency. Numerical evaluation of DT gives DT = 0.29 ms (I rr = 10 A and Cs1 = 25 nF). Evaluation of the loss gives 1.3x10-3 fs = 26.5 watts

27-8.

a. Ds shorts out the snubber resistance during the BJT turn-off. Hence Cs1 is directly across the BJT as in problem 27-7a. Thus the loss reduction is the same as in problem 27-7a. b. Equivalent circuit during BJT turn-off after free-wheeling diode reverse recovery is shown below. Rs + v CE I r r+ di C dt t Cs + v C v (0+ ) = V C d

dvC diC dvC vCE = CsRs dt + vC ;; Cs dt = - Irr - dt t Combining equations and solving for vCE(t) yields diC t2 È Irr diC˘ vCE(t) = Vd - Irr Rs - Í C + Rs dt ˙ t - dt 2 C Î s ˚ s At t = D T, vCE = 0 and turn-on is completed.

diC Irr + Rs Cs dt DT= + diC dt

È ÍIrr + Rs Cs diC Í Î dt

diC˘ 2 dt ˙

˙ ˚

2 Cs + di [Vd - Irr Rs] C dt

in

Vd D T goes to zero when Rs = I . hence there is no increase in power dissipation rr the BJT due to the presence of Cs.

27-9.

a.

Proposed snubber circuit configuration shown below. Ls

2 Vs

Rs

1

4 Io

Cs

3

2

Equivalent circuit swith SCRs 3 & 4 on and 1&2 going off or vice-versa. Continuous flow of load current formces SCRs 1 & 2 to remain on past the time of natural commutation (when vs(t) goes through zero and becomes negative). 3 or 4

Ls Irr 2 Vs

Rs 1 or 2 Cs

With 3 & 4 on, 1 & 2 are off, and effectively in parallel with the R s-Cs snubber. same is true when 1 & 2 are on and 3 & 4 are off. Thus the Rs-Cs snubber functions as a turn-off snubber. 0.05 Vs ; worst case situation (maximum reverse voltage across SCR Ia1 which is turning off) occurs when SCR which is turning on is triggered with a di delay angle of 90°. During reverse recovery of SCR1, L s dt = 2 Vs and b. w Ls =

Irr di = t . Solving for Irr yields dt rr È 2 w trr Ia1 Í Irr = ; Cbase = Ls Í 0.05 Î Irr ˘ 2 ˙ = 2 Vs˙ ˚ w Ia1 trr2 0.05 Vs

Smallest overvoltage occurs when Cs = Cbase. Putting in numerical values Cs = 0.9933 Ia1 mF 0.05 Vs 2 Vs = wt I Irr rr a1 4000 Ia1 (0.05) (230) 3050 = I -5) I (377) (10 a1 a1 ohms

Rbase =

=

ohms

Rs,opt = 1.3 Rbase = c.

Peak line voltage = 2 (230) = 322 V Smallest overvoltage = (1.5)(322) = 483 V which occurs when Cs = Cbase and Rs = 1.3 Rbase. For Ia1 = 100 A 4000 Rs,opt = 1.3 Rbase = 100 = 40 ohms ; Cs = (0.0033)(100) = 0.33 mF

27-10.

The resistor in the BJT/MOSFET snubber must be shorted out during the device turn-off so that the snubber capacitance is in parallel with the device. The uncharged capacitor delays the build-up of the large Vd voltage across the BJT/MOSFET until most of the current has been diverted from the switch. The snubber diode is forward biased during turn-off, thus providing the shorting of the snubber resistor as required. The turn-off of the thyristor limits overvoltages arising from the interruption of current through the stray inductance in series with the thyristor. Lowest overvoltages are obtained when Rs = 1.3 Rbase and Cs = Cbase. Overvoltages are 70-% larger if Rs is zero. Hence a diode in parallel with the resistor is not desirable.

27-11.

a.

dvDS Vd dvDS ; trv < 0.75 microseconds Check dt at turn-off; dt = t rv dvDS 700 > = 930 V/ms > 800 V/ms limit so snubber is needed. dt 7.5x10-7 Not enough information available to check on power dissipation or overcurrents.

b.

dvDS Io 100 = C = 400 V/ms ; Cs = = 0.25 mF dt s 4x108 Choose Rs to limit total current ID to less than 150 A 700 700 150 A = 100 + R ; Rs = 150 - 100 = 14 ohms s Check snubber recovery time = 2.3 Rs Cs = (2.3)(14)(2.5x10-7) = 8 ms

Off time of the IGBT is 10 microseconds which is greater than the snubber recovery time. Hence choice of Rs is fine.

28-1.

Schematic of drive circuit shown below. 100 V GG+ 100 A R G + V V DS

V

GG-

vDS(t) waveform same as in problem 22-2. dvDS Vd During MOSFET turn-on dt = t < 500 V/ms fv

Vd From problem 22-2, t fv During MOSFET turn-off,

ÈV Í GG+ - VGSth =Î RG Cgd dvDS Vd = t dt rv

Io ˘ gm˙

˚

< 500 V/ms Io ˘ gm˙

Vd From problem 23-2, t rv

ÈV + V Í GG- GSth + =Î RG Cgd

˚

Io 60 gm = V - VGSth = 7 - 4 = 20 A/V GS Estimate of RG for MOSFET turn-on: 100 VGG+ - 4 - 20 5x108 V/sec > (RG)(4x10-10) Io 100 ; VGG+,min = VGSth + g = 4 + 20 = 9 V m

Choose VGG+ = 15 V to insure that MOSFET driven well into ohmic range to minimize on-state losses. RG > 15 - 9 -10)(5x108) = 30 ohms (4x10

Estimate of RG at MOSFET turn-off: 100 VGG- + 4 + 20 5x108 V/sec > (RG)(4x10-10) Choose VGG- = -15 V to insure that MOSFET is held in off-state and to minimize turn-off times. RG > 15 + 9 = 115 ohms (4x10-10)(5x108)

Satisfy both turn-on and turn-joff requirements by choosing VGG+ = VGG= 15 V and RG > 115 ohms.

28-2.

a.

Circuit diagram shown below.

+

R

G1

Df Tsw

I o = 200 A

V = 1000 V d

-

R

G2

Qs

RG2 1000 When FCT is off we need VKG = (1.25) 40 = 31.25 V = (1000) R G1 + RG2 Now R G1 + RG2 = 10-6 ohms so 31.25 = (1000) (10-6) RG2 RG2 = 31.25 kW and RG1 = 969 kW

b.

MOSFET characteristics - large on-state current capability - low Ron - low BVDSS (BVDSS of 50-100 V should work)

29-1.

Assume Ts = 120 °C and T a = 20 °C. 0.12 ; A in m2 ; Eq. (29-18) Rq,rad ≈ A Èd ˘ 1 Í vert˙ 1/4 Rq,conv ≈ (1.34)(A) Î DT ˚ ; Eq. (29-20) Rq,conv ≈ 0.24 1/4 for DT = 100 °C. A [dvert]

A cube having a side of length dvert has a surface area A = 6 [dvert]2 Rq,conv ≈ 0.4 [dvert]1.75 0.02 ; Rq,rad ≈ [dvert]2 Rq,conv Rq,rad

Rq,sa = net surface-to-ambient thermal resistance = R q,conv + Rq,rad 0.04 Rq,sa = [dvert]1.75 + 2 [dvert]2 Heat Sink # Volume [m]3 dv = (vol.)1/3 [m] A = 6 [dv]2 [m]2 dv1.75 dv2 Rq,sa [°C/W] Rq,sa (measured) 1 7.6x10-5 0.042 0.011 0.004 0.0018 5.3 3.2 2 10-4 0.046 0.013 0.046 0.0021 4.5 2.3 3 1.8x10-4 0.057 0.019 0.0066 0.0032 3.1 2.2 5 2x10-4 0.058 0.002 0.0069 0.0034 2.9 2.1 6 3x10-4 0.067 0.027 0.0088 0.0045 2.3 1.7

Heat Sink #

7

8

9

10

11

12

Volume [m]3 dv = (vol.)1/3 [m] A = 6 [dv]2 [m]2 dv1.75 dv2 Rq,sa [°C/W] Rq,sa (measured)

4.4x10-4 0.076 0.034 0.011 0.0058 1.8 1.3

6.810-4 0.088 0.046 0.014 0.0078 1.4 1.3

6.1x10-4 0.085 0.043 0.013 0.0071 1.5 1.25

6.3x10-4 0.086 0.044 0.014 0.0073 1.4 1.2

7x10-4 0.088 0.047 0.014 0.0078 1.3 0.8

1.4x10-3 0.11 0.072 0.021 0.012 0.9 0.65

Heat sink #9 is relatively large and cubical in shape with only a few cooling fins. Heat sink #9 is small and flat with much more surface area compared to its volume. Large surface-to-volume ratios give smaller values of Rq,sa.

29-2.

Rq,conv ≈

0.24 1/4 for DT = 100 °C ; From problem 29-1 A [dvert]

Rq,conv ≈ 24 0 [d vert]1/4 for DT = 100 °C and A = 10 cm2 = 10-3 m2 dvert 1 cm 5 cm 12 cm 20 cm Rq,conv 76 °C/W 113 °C/W 141 °C/W 160 °C/W

160 140 120 R q ,conv °C/W 100 80 60 40 20 0 0 2 4 6 B B B

B

8 10 12 14 16 18 20 dvert [cm]

29-3.

1 Rq,conv ≈ (1.34)(A)

Èd ˘ Í vert˙ 1/4 ; Eq. (29-20) Î DT ˚ A = 10 cm2 and dvert = 5 cm DT 60 °C 80 °C 100 °C 120 °C Rq,conv 127 °C/W 118 °C/W 112 °C/W 107 °C/W

Rq,conv ≈ 353 [DT]-.25

140 120 100 Rq ,conv °C/W 80 60 40 20 0 60 70 80 90 100 110 120 DT [°C] B B B

B

29-4.

Rq,rad =

DT Ê Ê Ts ˆ4 Ê Ta ˆ4 ˆ ÁÁ ˜ Á ˜ ˜ 5.1 A Ë Ë100¯ - Ë100¯ ¯ 120 - Ta(° C)

; Eq. (29-17)

Rq,rad = 196 È ÈTa(° K)˘4 ˘ Í Í ˙ ˙ Î239 - Î 100 ˚ ˚ Ta 0 °C 10 °C 20 °C 40 °C

; A = 10 cm2 and Ts = 120 °C

Rq,rad 128 °C/W 123 °C/W 119 °C/W 110 °C/W

140 120 R 100 q ,rad 80 [ °C / W ] 60 40 20 0 0 5 10 15 20 25 30 35 40 Ta [°C ] B B B

B

29-5.

Rq,rad =

DT Ê Ê Ts ˆ4 Ê Ta ˆ4 ˆ ÁÁ ˜ Á ˜ ˜ 5.1 A Ë Ë100¯ - Ë100¯ ¯

; Eq. (29-17)

Ts(° C) - 40 Rq,rad = 196 ÈÈT (° K)˘4 ˘ ÍÍ s ˙ ˙ ÎÎ 100 ˚ - 96˚ Ts 80 °C 100 °C 120 °C 140 °C

; A = 10 cm2 and Ta= 40 °C

Rq,rad 114 °C/W 120 °C/W 110 °C/W 101 °C/W

120 100 R q,rad [ °C / W ] 80 60 40 20 0

B

B B B

80

90

100

110

120

130

140

T s [ °C ]

29-6.

PMOSFET,max =

150 ° C - 50 ° C 1 ° C/W

= 100 W ; 100 W = 50 + 10-3 fs

Solving for fs yields fs = 50 kHz

29-7.

PMOSFET = 50 + 10-3 • 2.5x104 = 75 W Rq,ja = Rq,jc + Rq,ca = 150 ° C - 35 ° C 75 W = 1.53 °C/W

Rq,ca = 1.53 - 1.00 = 0.53 °C/W

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